Cisco · 2 days ago
FPGA Senior Design Engineer
Milpitas, CA
Full-time
Onsite
Senior Level, Lead/Staff
$169K/yr - $241K/yr
8+ years expCisco Systems is responsible for designing and developing high-performance, secure firewall hardware platforms. The FPGA Senior Design Engineer will provide technical leadership in the architecture, design, and implementation of complex, high-speed digital systems, owning the end-to-end FPGA development process for critical products.
Communications InfrastructureEnterprise SoftwareHardwareSoftware
Responsibilities
Take ownership of complex FPGA sub-modules, from micro-architecture definition to RTL implementation using Verilog/SystemVerilog or VHDL
Define, architect, and implement high-performance digital logic using Hardware Description Languages (Verilog/SystemVerilog) for FPGAs
Develop comprehensive, self-checking testbenches and environments to verify FPGA functionality at the block and system level using simulation tools (e.g., VCS)
Manage the entire FPGA tool flow, including synthesis, placement, routing, and static timing analysis. Aggressively pursue timing closure to meet strict performance requirements
Integrate and verify internal and third-party Intellectual Property (IP) cores, such as high-speed memory controllers (HBM/DDR5), PCIe endpoints, and specialized DSP functions
Collaborate closely with hardware, software, and systems engineers to define interfaces, perform board-level bring-up, and debug integrated systems using lab equipment (oscilloscopes, logic analyzers, spectrum analyzers)
Create and maintain detailed design specifications, verification plans, and production release documentation
Analyze and optimize designs for efficiency, focusing on resource utilization, power consumption, and thermal performance
Qualification
Required
8+ years of experience with a Masters' degree or 10+ years of experience with a Bachelors' degree. Experience expected to be in ASIC/FPGA design
Experience in end-to-end FPGA development process
Hands-on experience with EDA tools such as VCS, Spyglass, and nLint
Expertise in verifying complex blocks, clusters, and top-level designs
Practical knowledge of System Verilog constraints, structures, and classes
Familiarity with TCL and/or Python scripting for automation tasks
Preferred
Strong domain expertise in one or more protocols, including PCIe, Ethernet, DMA, and DDR
In-depth knowledge of L2/L3/L4 networking protocols such as IPSec/DTLS, TLS, TCP/IP/UDP, and a deep understanding of cryptography technologies and algorithms such as AES-GCM/CBC, EDCHE RSA 2k, etc
A structured approach to design and effective problem-solving skills
Experience in x86 and ARM-based board design
Expertise in Ethernet interface design across various speeds (1G/10G/40G/100G/400G)
Benefits
Medical, dental and vision insurance
401(k) plan with a Cisco matching contribution
Paid parental leave
Short and long-term disability coverage
Basic life insurance
10 paid holidays per full calendar year
1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
Paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time per full calendar year
Flexible vacation time off program
80 hours of sick time off provided on hire date
Up to 80 hours of unused sick time carried forward
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer
Annual bonuses subject to Cisco’s policies
Company
Cisco
Cisco develops, manufactures, and sells networking hardware, telecommunications equipment, and other technology services and products. It is a sub-organization of Cisco Press.
10001+ employees
H1B Sponsorship
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2025 (1238)
2024 (1231)
2023 (1273)
2022 (2127)
2021 (1991)
2020 (1173)
Funding
Current Stage
Public CompanyTotal Funding
unknown1990-02-13IPO
Leadership Team
Chuck Robbins
Chair and CEO
Carl Solder
Chief Technology Officer - Cisco System Australia/New Zealand
Recent News
2026-01-08
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