Marvell Technology · 1 day ago
Advanced Packaging Technology Pathfinding and Development Engineer
Marvell Technology is a leader in semiconductor solutions, focusing on data infrastructure that connects the world. They are seeking an Advanced Packaging Technology Pathfinding and Development Engineer to develop packaging technology roadmaps and collaborate on high-performance computing and AI solutions, ensuring reliability and manufacturability of next-generation packaging technologies.
DSPInternet of ThingsManufacturingSemiconductorWireless
Responsibilities
Develop packaging technology roadmap for AI XPU, XPU-attach and Switch
Explore technologies beyond what is currently available, make recommendations, and create and protect IP to maximize performance. Create new package technology concepts from open ended ideas, perform routing feasibility, signal and power integrity studies for design optimization. Explore technology feasibility and create proof-of-concept samples and productize technologies
Define package architecture including chiplet topology, interposer/substrate scaling, power delivery network strategy, and thermal design envelope. Lead co-design efforts across silicon design, floorplanning, PDN modeling, and mechanical/thermal reliability. Lead package material selection, substrate stack-up definition, mechanical modeling, and reliability analysis. Partner with silicon design teams to co-optimize die floorplan, bump map, TSV, and RDL requirements
Work with OSATs / Foundry partners to evaluate process capability, manufacturability, yield, and cost. Drive package qualification and reliability validation to volume readiness
Qualification
Required
Experience in advanced package and substrate technologies with deep understanding of process and materials, component and board level reliability, warpage and thermal management
Experience in managing substrate and assembly material vendors, substrate manufacturers, OSATs and foundries
Deep knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies
Experience in signal and power integrity simulations, analysis and optimization for 2.5D and 3D packages including interface with memory, interposer, substrates and PCBs
Ability to determine optimal signal routing, power delivery verification and package size determination
Bachelor's degree in mechanical engineering, material science or related fields and 15+ years of related professional experience or master's degree and 12+ years of related professional experience or PhD degree / post-doc with 8+ years of experience
Experience interfacing with product design teams for optimized floor-planning, package related design input and power delivery network design
Bachelor's degree in electrical engineering or related fields and 15+ years of related professional experience in signal and power integrity, or master's degree and 10+ years of related professional experience, or PhD degree with 8+ years of experience
Ability to develop an idea into a proof of concept and then a proof of concept into a productizable technology
Deep understanding of fundamental concepts of signal and power integrity, transmission line and electromigration, and the ability to apply those concepts to create new design rules and explore new technologies utilizing current baseline for 2.5D/3D package technology
Mastery in tools and workflows to guide and enable the team on what sims need to be run: previous hands-on experience with signal and power integrity analyses using Cadence Sigrity PowerSI and Ansys SIwave; EM sims using Ansys HFSS, SI-Wave, Cadence Clarity, and the ability to correlate that with real world challenges
Good understanding of interposer, substrate, package, PCB level design rules, ability to perform routing feasibility studies using Cadence APD or PCB editor
Good understanding of chip-package interactions and failure mechanism at component and board level, thermal and warpage management
Ability to manage programs involving cross-functional teams
Strong interpersonal skills and willingness to learn new things are necessary along with the ability to work with stakeholders in multiple time zones across the globe
Ability to influence vendors to align their roadmap with company goals
Strong communication, presentation and documentation skills
Preferred
Prior experience in data center AI accelerators, networking silicon, or custom HPC silicon
Board, system and rack level integration, thermal, mechanical, signal and power analysis
Ability to influence senior stakeholders across architecture, silicon design, system platform engineering, and supply chain
Experience setting roadmaps, not just executing them
Experience with silicon disaggregation and reaggregation and memory integration
Demonstrated leadership driving cross-company supplier programs
Experience with VNA and TDR measurements for package and PCB characterization
Benefits
Employee stock purchase plan with a 2-year look back
Family support programs to help balance work and home life
Robust mental health resources to prioritize emotional well-being
Recognition and service awards to celebrate contributions and milestones
Company
Marvell Technology
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.
H1B Sponsorship
Marvell Technology has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (242)
2024 (186)
2023 (154)
2022 (210)
2021 (210)
2020 (165)
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired
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