Field-Programmable Gate Arrays Engineer (TS/SCI FSP) jobs in United States
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Arcadia · 1 day ago

Field-Programmable Gate Arrays Engineer (TS/SCI FSP)

Arcadia is a mission-oriented engineering team seeking a customer-focused FPGA/ASIC Design Engineer to work on-site in a collaborative environment. The engineer will design, develop, verify, and debug FPGA, ASIC, and embedded firmware solutions while collaborating closely with software and systems engineering teams.

Staffing & Recruiting
badNo H1BnoteSecurity Clearance RequirednoteU.S. Citizen Onlynote
Hiring Manager
Denis Mikush
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Responsibilities

Design, develop, verify, and debug FPGA, ASIC, and embedded firmware solutions
Conceptualization, documentation, coding, lab debugging, and close collaboration with software and systems engineering teams
Lead small teams and mentor junior engineers

Qualification

TS/SCI FSPVHDL RTL codingFPGA design toolsVerilog/SystemVerilogLinux/Windows OSDesign simulation toolsC/C++/Python/PerlSoft/hard IP coresASIC implementation flowsFormal verification toolsSemiconductor processesCommunication skills

Required

Active TS/SCI with Full-Scope Polygraph (FSP)
Experience with VHDL RTL coding for digital circuit design/analysis
Experience with FPGA design, synthesis, and P&R tools (e.g., Vivado, Quartus)
Experience developing Verilog/SystemVerilog testbenches
Proficiency with Linux/Windows operating systems
Knowledge of at least one design simulation tool (Mentor, Cadence, Synopsys)
Strong oral and written communication skills
Ability to work on-site at Fort Meade, MD
Minimum 3 years of experience in integrated circuit, microelectronics design, or reverse engineering
Bachelor's degree in Electrical Engineering or Computer Engineering; Five additional years of experience may substitute for a degree

Preferred

Experience with Verilog RTL coding
Experience using soft/hard IP cores (e.g., Zynq, MicroBlaze, RISC processors, memory, flash/NVM)
Experience in reverse engineering digital designs at various abstraction levels
Knowledge of ASIC implementation flows (synthesis, physical layout)
Familiarity with formal verification tools
Understanding of semiconductor manufacturing processes
Experience with C/C++, Python, Perl, or scripting languages

Benefits

Employer-paid medical, dental, and vision
25 days PTO + 11 federal holidays
401(k): 6% employer contribution + 9% profit sharing
Flexible work schedules and comp-time
Equal Opportunity/Affirmative Action environment welcoming all qualified applicants

Company

Arcadia

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Arcadia specializes in high-impact - permanent and contract - recruitment at the crossroads of technology, business, and innovation.

Funding

Current Stage
Early Stage
Company data provided by crunchbase