Chiparama ยท 1 day ago
Sr. Static Timing Analysis Engineer
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
12+ years expChiparama is seeking a highly experienced STA Engineer to support full-chip timing closure for complex, high-performance SoCs. The role involves ownership of timing analysis, constraint development, and cross-functional collaboration across architecture, RTL, physical design, and IP teams.
Information Technology & Services
Hiring Manager
Prashant Gautam
Responsibilities
Own full-chip STA for full chip programs
Develop, refine, and validate top-level SDC constraints including clocks, generated clocks, virtual clocks, I/O timing, false/multicycle paths, and hierarchical timing interfaces
Perform timing analysis across complex setups, capturing specific corner definitions, derates, and signoff criteria
Drive timing closure through close interaction with physical design teams across floorplanning, CTS, P&R, and ECO cycles
Debug timing issues arising at block, subsystem, and full-chip level; guide design teams to provide RTL/PnR fixes
Review and integrate SDC constraints from multiple IP and subsystem owners; ensure alignment with methodology
Provide justification for timing exceptions and validate them against real design intent
Execute timing signoff checks including SI, OCV/AOCV, uncertainty modeling, waveform compliance, IO/PHY timing, and asynchronous interface handling
Support full-chip integration, clocking architecture reviews, and hierarchical STA closure
Participate in timing methodology improvements and contribute to internal scripts and flows
Qualification
Required
12+ years of hands-on experience in Static Timing Analysis and SDC constraint development
Proficiency with Tcl scripting and automation of STA flows
Solid understanding of physical design, including CTS, placement, routing, useful skew, and ECO timing strategies
Strong debugging skills and ability to resolve critical timing issues under tapeout schedule
experience in advanced technology nodes (e.g., 7nm, 5nm) with signoff exposure
Company
Chiparama
Chiparama: Your Global Partner for ASIC & SOC Design At Chiparama (www.chiparama.com), we specialize in delivering cutting-edge ASIC and SOC design solutions.
11-50 employees
Funding
Current Stage
Early StageCompany data provided by crunchbase