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Google DeepMind · 1 day ago

Silicon Microarchitecture Engineer

Mountain View, California, US

Full-time

Onsite

Senior Level

7+ years exp

Google DeepMind is a team of scientists and engineers working to advance artificial intelligence for public benefit. They are seeking a highly motivated Hardware Engineer to contribute to the development of groundbreaking silicon for machine learning acceleration, collaborating with interdisciplinary teams to explore architecture designs and coordinate chip design efforts.

Artificial Intelligence (AI)Business DevelopmentMachine Learning

Growth Opportunities

Responsibilities

Work in a fast and interdisciplinary team bringing together experts from Machine Learning, Hardware, Programming Languages and Systems

High performance machine learning accelerator architecture, micro-architecture and RTL design

Selection and integration of in-house and third party IP

Exploration of various trade-offs of future architecture designs in terms of performance, power, energy, and area

Participate in the system architecture definition and evaluation

Collaboration with simulation and PD teams to maintain up to date cost functions for architecture evaluation

Coordinate the chip design collaboration across the teams

Collaboration with the design automation teams and provide steering and guidance for tool development

Qualification

RTL designMicro-architecture definitionASIC design flowHigh performance compute IPsC++PythonDesign VerificationHigh level synthesisTransformer-based modelsLow power architecturesSoC integration

Required

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience

7+ years of experience in RTL design in Verilog/System Verilog

5+ years of experience in micro-architecture definition

3+ years of experience in RTL design verification

Experience with high performance compute IPs (e.g., GPUs, DSPs, or machine learning accelerators)

Experience in evaluating trade-offs such as speed, performance, power, area

Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis

Hands-on knowledge of basic hardware requirements and building blocks of ML accelerators - custom number formats, matrix multiply units, vector and elementwise computation etc

Preferred

Working experience developing with C++ & Python

Physical Design background or hands on experience

Design Verification background or hands on experience

Knowledge/understanding of high level synthesis

Working knowledge of transformer-based large language models

Knowledge of high performance and low power architectures for ML acceleration

Knowledge of processor core SoC integration

Company

Google DeepMind

Glassdoor4.5

Google DeepMind aims to research and build safe artificial intelligence system to solve intelligence and advance science and humanity. It is a sub-organization of Google.

Founded in 2010

London, England, GBR

501-1000 employees