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AMD · 1 day ago

3.5D Packaging For Datacenter GPU

Austin, TX

Full-time

Onsite

Senior Level, Lead/Staff

$142K/yr - $212K/yr

10+ years exp

AMD is a company focused on building innovative products that enhance computing experiences across various sectors. The role involves executing the productization of advanced chiplet packaging architectures for high-performance computing applications, coordinating design and assembly, and ensuring robust manufacturing processes.

AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor

Growth Opportunities

No H1B

Responsibilities

Coordinate package design and assembly of advanced 2.5D/3D packages, driving material and BOM choices, body sizes, manufacturability, and package constructions to achieve acceptable DFM requirements

Coordinate with SoC architects, silicon design, and product teams to recommend the optimum package solutions to meet electrical, mechanical, thermal, and system level requirements

Interface closely with AMD’s manufacturing and material partners to productize advanced packaging solutions from concept to NPI. Prototyping to mass production phases with acceptable sustaining yields

Support and collaborate with customers to ensure that AMD packages/products can meet their quality, reliability, system, and operational needs

Perform product risk assessment with mitigation plans and establishing best known processes methodology to ensure robust package quality, reliability, and manufacturing yield

Lead and perform DOE definition for process optimization and material screening to enable new product concepts with optimum yield targets

Drive design solutions to address SI/PI, reliability, and thermal challenges associated with package design and materials

Qualification

2.5D/3D packaging technologiesSemiconductor packaging experienceProduct package qualificationSurface mount technologyWafer bumpingThermal interface materialsSubstrate designProblem solvingCommunication skillsOrganizational skillsInterpersonal skillsPresentation skills

Required

Strong organizational skill to coordinate heterogeneous integration packaging solutions with advanced packaging technologies, delivering project milestones across internal and external teams for mature product readiness and robust high volume manufacturing

Working knowledge of advanced 2.5D/3D package manufacturing and materials preferred

Coordinate package design and assembly of advanced 2.5D/3D packages, driving material and BOM choices, body sizes, manufacturability, and package constructions to achieve acceptable DFM requirements

Coordinate with SoC architects, silicon design, and product teams to recommend the optimum package solutions to meet electrical, mechanical, thermal, and system level requirements

Interface closely with AMD's manufacturing and material partners to productize advanced packaging solutions from concept to NPI

Prototyping to mass production phases with acceptable sustaining yields

Support and collaborate with customers to ensure that AMD packages/products can meet their quality, reliability, system, and operational needs

Perform product risk assessment with mitigation plans and establishing best known processes methodology to ensure robust package quality, reliability, and manufacturing yield

Lead and perform DOE definition for process optimization and material screening to enable new product concepts with optimum yield targets

Drive design solutions to address SI/PI, reliability, and thermal challenges associated with package design and materials

Bachelor/Master of Science in materials, mechanical, chemical, or electrical engineering

Preferred

10 + years of semi-conductor packaging experience

Experience and working knowledge with 2.5D/3D advanced packaging technologies such as WLFO, SoIC, CoWoS, InFO, IVR, and other chiplet/SiP architectures

Knowledge of surface mount technology (SMT) and process development for advanced system assembly

In depth experience with product package qualification including process characterization, Product Life Management, Chip-Package Interactions, Test-Package Interactions, environmental testing of component and board level reliability, and failure analysis techniques

Experience with wafer bumping, wafer sorting, package assembly, substrate technology, thermal interface materials, adhesives and underfills, package testing, package socketing, and associated metrologies

Knowledge in substrate design, manufacturing, and assembly interactions

Strong problem solving, communication, organizational, interpersonal, and presentation skills