Cisco · 3 days ago
Lead SW Post-Silicon Validation Engineer
Cisco is a leading networking company that offers a dynamic environment for innovation. The Lead SW Post-Silicon Validation Engineer will lead the validation of high-performance networking silicon, developing validation software and driving root-cause analysis of issues throughout the silicon lifecycle.
Communications InfrastructureEnterprise SoftwareHardwareSoftware
Responsibilities
Lead post-silicon validation efforts for networking ASICs
Own and execute comprehensive validation plans covering functionality, performance, power, and reliability
Drive silicon bring-up, stepping qualification, and production readiness activities
Mentor engineers and provide technical guidance across validation efforts
Architect and develop validation software, diagnostics, and automation frameworks
Write low-level and system software (C/C++, Python) to exercise networking features and hardware blocks
Develop stress, scale, and long-duration tests to uncover silicon defects
Integrate validation tests into regression and continuous test environments
Perform complex hardware-software co-debug using lab and software tools
Analyze packet flows, performance counters, traces, and logs to identify failure mechanisms
Isolate issues across silicon, firmware, drivers, and OS layers
Partner with SDK, architecture, and firmware teams to drive issue resolution
Validate networking protocols and features such as Ethernet, switching, routing, QoS, traffic management, and security
Validate high-speed interfaces (e.g., Ethernet PHY/MAC, PCIe, SerDes, DDR5, USB3.x)
Validate low speed interfaces (e.g., USB2.0, eMMC, SPI, MDIO, I2C, UART)
Exercise data plane and control plane functionality under real-world traffic conditions
Work closely with architecture, SDK, firmware, systems, and software teams
Provide structured feedback to improve silicon robustness, debuggability, and testability
Document validation results, silicon issues, and recommended workarounds
Qualification
Required
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 8+ years of experience in post-silicon validation and debug
Experience in C/C++ for system-level or low-level software development
Scripting experience in Python for test automation and analysis
Experience with networking architectures and protocols
Experience with hardware-software co-debug in lab environments
Debug experience with: DDR5, USB3.0, SGMII, PCIe Gen3, USB2.0, eMMC, SPI, MDIO, I2C, UART
Preferred
Experience with networking ASICs, switches, routers, or NPUs
Knowledge of Ethernet standards (1G–800G), PCIe, and high-speed SerDes
Experience with Linux kernel, drivers, networking stacks
Familiarity with traffic generators, packet analyzers, and protocol analyzers
Experience with performance benchmarking, latency analysis, and throughput optimization
Benefits
Medical, dental and vision insurance
401(k) plan with a Cisco matching contribution
Paid parental leave
Short and long-term disability coverage
Basic life insurance
10 paid holidays per full calendar year
1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
Paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time per full calendar year
Flexible vacation time off program
80 hours of sick time off
Up to 80 hours of unused sick time carried forward
Additional paid time away may be requested
Optional 10 paid days per full calendar year to volunteer
Annual bonuses subject to Cisco’s policies
Company
Cisco
Cisco develops, manufactures, and sells networking hardware, telecommunications equipment, and other technology services and products. It is a sub-organization of Cisco Press.
H1B Sponsorship
Cisco has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
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2025 (1238)
2024 (1231)
2023 (1273)
2022 (2127)
2021 (1991)
2020 (1173)
Funding
Current Stage
Public CompanyTotal Funding
unknown1990-02-13IPO
Leadership Team
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