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Sanmina · 4 months ago

Principal Microelectronics Engineer - (64066)

H4021 - Viking Technology - Costa Mesa, CA 92626 US (Primary)

Full-time

Hybrid

Lead/Staff

10+ years exp

Sanmina is a leading provider in the Enterprise and Embedded server and storage market. The Principal Microelectronics Engineer will lead the design and development of innovative microelectronics packaging solutions for high-density memory products targeted at defense, aerospace, and commercial markets.

Industrial EngineeringManufacturingSupply Chain Management

No H1B

U.S. Citizen Only

Responsibilities

Lead a team of engineers and subcontractors in the development and qualification of DRAM and Flash products including multichip modules (MCM), plastic ball grid array multichip packages (MCP), and System-In-Package (SiP) solutions

Responsible for project scheduling and execution, project status reporting, and providing technical guidance to the team

Interface directly with onshore and offshore assembly and test subcontractors (OSAT) and OEM customers

Some travel may be required

Qualification

Microelectronics packaging designProject managementCross-functional team leadershipSemiconductor package designHigh volume manufacturing processesPackaging qualification testingPrinted circuit board assemblySilicon wafer techniquesIntegrated circuit test techniquesWafer level packagingSurface Mount Technology (SMT)Communication skills

Required

Minimum 10-12 years related experience

BS in Microelectronics Packaging, EE, Mechanical Engineering, Physics, or Materials

Experience in the design of semiconductor packages such as plastic ball grid arrays, MultiChip Packages (MCPs), and System-in-Package (SiP)

Solid understanding of semiconductor package design parameters and their influence on cost, thermal and electrical performance, reliability, and manufacturability

Experience leading cross-functional engineering teams in complex microelectronics packaging projects

Project management experience including scheduling, status reporting, and subcontractor management

Thorough understanding of microelectronics package design flow, including mechanical design, signal integrity simulation, thermal simulation, schematic capture, and PCB layout

Thorough understanding of high volume manufacturing processes for semiconductor ICs (backend packaging and test)

Familiarity with silicon wafer post-process techniques such as wafer thinning, dicing, and RDL application

Thorough understanding and experience in packaging qualification testing techniques and industry standard test methods

Experience interfacing directly with onshore and offshore microelectronics assembly and test subcontractors (OSAT)

Experience with printed circuit board assembly, SMT processing equipment and methods

Familiarity with integrated circuit functional test and burn in techniques

Excellent verbal and written communication skills

Wafer level packaging, Wafer preparation (dicing, grinding, wafer expansion, die singulation)

Die pick and place, Die Attach, Die Stack, MEMS die, FLIP CHIP, Underfill, Thermo-compression bonding, WIREBOND, Molding (transfer mold)

Compression mold, vacuum mold, film-assist mold), Dam and Fill dispense, Ball Attach, Solder Reflow, Singulation, Tape and Reel, SMT (Surface Mount Technology). Packages handled and developed: QFP, TQFP, SOP, TSOP, QFN, Flip Chip, Cu pillar FC, BGA, CSP, FAN-OUT WAFER LEVEL PACKAGING (FOWLP), 2.5DIC, 3DIC, Thru mold vias, Thru-silicon

Must be US Citizen or lawful permanent resident