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Intel Corporation · 1 day ago

IP Enablement Application Engineer

US, Oregon, Hillsboro

Full-time

Hybrid

Mid Level

$122K/yr - $232K/yr

3+ years exp

Intel Corporation is a leader in the semiconductor industry, focusing on cutting-edge technology for the AI era. The IP Enablement Application Engineer role involves providing technical support for IP integration, collaborating with design teams, and enhancing customer satisfaction through quality improvements and training.

Semiconductors

Growth Opportunities

No H1B

Security Clearance Required

U.S. Citizen Only

Responsibilities

Provide comprehensive technical support to Intel Foundry Services customers on IP integration issues, working independently with design teams and customers to solve complex challenges remotely or onsite

Fully own assigned IPs and work with internal and external customers to help them integrate Intel IPs into SoCs, providing expert technical support throughout the integration process

Drive resolution of customer issues related to IP collaterals generation, logic design verification, IP release, and integration in SoC environments

Work with cross-functional teams to develop SoC and IP integration methodologies and best practices

Engage with IP development teams to ensure all IP collaterals are generated and provided according to customer requirements and industry standards

Collaborate with internal teams across Intel and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution

Engage in upfront identification and documentation of customer requirements, working with IP design teams to disposition and address requests

Prepare comprehensive customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug

Create application notes, documentation, and deliver technical training presentations to customers and internal teams

Drive quality improvements in design kits and documentation, assisting in removing barriers to successful customer design tape-outs

Support debugging and problem-solving activities in collaborative team environments

Contribute to methodology improvements that enhance IP integration productivity and customer satisfaction

Qualification

SoC IP IntegrationRTL designVerilog/System VerilogASIC developmentIP integrationVCSPythonPerl/TclTechnical problem-solvingCommunication skills

Required

US Citizenship required

Ability to obtain a US Government Security Clearance

Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study

2+ years of experience in SOC IP Integration

3+ years of combined experience in RTL design and DFT using Verilog/System Verilog

Experience in ASIC or SoC development

Preferred

Active US Government Security Clearance with a minimum of Secret level

Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study

Experience with one or more industry standard IO interfaces including (ADPLL, GPIO, Digital Thermal Sensors, DDR, LPDDR, PCIE, USB, USB TypeC, Ethernet, etc.)

Experience with VCS, Verdi, Spyglass or equivalent tools

Experience with IP integration and design flow challenges within the context of subsystems and SOCs

Experience with IP development

Experience in scripting languages like such as Perl/Tcl/ and Python