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Boeing · 1 day ago

ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal

El Segundo, CA

Full-time

Onsite

Entry, Mid, Senior Level

2+ years exp

Boeing is a leading aerospace company committed to innovation and collaboration. They are seeking multiple ASIC/FPGA Verification Engineers to develop state-of-the-art digital ICs/SoCs supporting critical programs across the enterprise, collaborating with cross-functional teams to ensure alignment with project goals.

AerospaceIndustrial

No H1B

Security Clearance Required

U.S. Citizen Only

Responsibilities

Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog

Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming principles such as Inheritance and Polymorphism, while utilizing UVM to build drivers, monitors, predictors, and scoreboards

Create Functional Coverage Models and conduct Code Coverage analysis to ensure thorough verification of designs during simulation

Set up regression tests and collect coverage metrics to ensure comprehensive verification and track progress over time

Assist in FPGA-based prototyping and validation based on program and system requirements and complexity

Collaborate with cross-functional teams to ensure that verification strategies align with overall project goals and timelines

Qualification

ASIC/FPGA verificationSystemVerilog/UVMObject-Oriented ProgrammingFunctional Coverage ModelsCode Coverage analysisLinux EnvironmentsCollaboration skillsProblem-solving skillsCommunication skillsTeamwork

Required

A Bachelor of Science degree in Engineering (specializing in Electrical, Mechanical, or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent non-US qualifications relevant to the job description

Proven experience in ASIC/FPGA verification processes

Familiarity with defining the architectural framework for ASIC/FPGA verification using SystemVerilog/UVM, including the delivery and release of production designs

Proficiency in hardware verification languages, particularly SystemVerilog and SystemVerilog Assertions

Demonstrated experience in implementing test plans effectively

Solid understanding of Object-Oriented Programming principles, such as Inheritance and Polymorphism

Capability to design self-checking and reusable testbenches from the ground up

Experience in developing Functional Coverage Models and achieving Code Coverage closure

Capable of collaborating with design and system engineering to establish accurate and verifiable ASIC/FPGA level specifications

Familiarity with waveform debug tools

Revision Control Systems: svn, cvs, git

Proficient in Linux Environments