Micron Technology · 19 hours ago
Staff Process Integration Engineer, APTD
Micron Technology is a world leader in innovating memory and storage solutions. As a Staff Process Integration Engineer in the Advanced Packaging Technology Development department, you will own the end-to-end integration of next-generation package architectures and lead the development of advanced packaging technology, ensuring high performance and reliability in semiconductor products.
ComputerHardwareManufacturingSemiconductor
Responsibilities
Own package‑level process integration across 2.5D/3D flows (wafer-to-wafer, chip-to-wafer, advanced interconnects), defining specs and process windows that meet high performance targets for HPC/AI products
Develop and integrate semiconductor manufacturing processes. Design, optimize, and implement fabrication flows that seamlessly integrate multiple steps, including lithography, etch, deposition, diffusion, CMP, and thin films, into cohesive production processes
Analyze yield, performance, and defect data to root-cause process weaknesses, yield issues, and tool variances; Employ SPC and advanced analytics
Lead technology transfer from TD to TD and HVM, establishing mask rules, materials, tool readiness, baseline qualification, and technology validation plans
Design and execute experiments (DOEs) on bonding, underfill, molding, stacking, and integration steps. Apply SPC to parametrics and yield detractors, validate new materials, design rules to improve yield and device performance, and close the loop with corrective actions
Manage hybrid bonding (Cu‑Cu + dielectric) integration. Set surface prep, planarity, and alignment requirements. Qualify W2W/C2W flows and track defectivity and reliability
Optimize underfill, TC bonding windows, and pillar/bump geometries for high‑I/O assemblies
Co‑optimize TSV/interconnect routing and thermal paths to meet bandwidth/latency targets, aligning package floorplans with chiplet partitioning
Predict and mitigate wafer/die warpage engineering via modeling, cure‑shrinkage controls, and material/process levers; Validate with inline metrology
Leverage metrology and inspection skills to deploy SAM, IR microscopy, and emerging XRD warpage mapping to correlate processes, defects, and reliability
Qualification
Required
BS or MS in Materials/Chemical Engineering
6+ years in semiconductor technology development with cleanroom experience
Hands‑on knowledge of advanced interconnects and bonding flows
Proficiency in DOE/SPC and data analysis (JMP/Minitab/Python) with demonstrated root‑cause problem solving and yield improvement
Experience with metrology; SAM, X‑ray/CT, IR, warpage profilers (shadow moiré/DIC)
Strong communication and technical writing skills with the ability to lead cross‑functional teams and drive action in fast‑paced environments
Direct experience with hybrid bonding integration and reliability (W2W/C2W)
Warpage modeling and inline correlation experience
Benefits
Choice of medical, dental and vision plans
Benefit programs that help protect your income if you are unable to work due to illness or injury
Paid family leave
Robust paid time-off program
Paid holidays
Company
Micron Technology
Micron Technology is a semiconductor company that produces DRAM, SDRAM, flash memory, SSD and CMOS image sensing chips.
H1B Sponsorship
Micron Technology has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (573)
2024 (429)
2023 (299)
2022 (626)
2021 (564)
2020 (538)
Funding
Current Stage
Public CompanyTotal Funding
$8.9BKey Investors
U.S. Department of Commerce
2025-04-24Post Ipo Debt· $1.75B
2025-01-16Post Ipo Debt· $1B
2024-04-18Grant· $6.1B
Leadership Team
Recent News
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