Intel Corporation · 5 days ago
Senior DFT Engineer
Phoenix, AZ
Full-time
Hybrid
Mid, Senior Level
$164K/yr - $232K/yr
3+ years expIntel Corporation is a leader in computer graphics innovation, seeking a Senior DFT Engineer to join their AI SOC Engineering team. The role involves designing and validating GPU cores, focusing on DFT features, RTL/GLS validation, and ensuring high-quality integration of GPU blocks.
Semiconductors
Responsibilities
You will work on the design, RTL/GLS validation, automation, and/or timing analysis for Scan/ATPG and/or DFT/JTAG controller
You will also contribute or be involved with trace/pattern generation efforts as well as post-silicon enabling, debug support, and/or analysis of the DFx features/content types you are responsible for
Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs
Participates in the definition of architecture and microarchitecture features of the block being designed
Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation
Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features
Supports SoC customers to ensure high-quality integration of the GPU block
Qualification
Required
Bachelors Degree in Electrical Engineering, Computer Engineering, or related STEM degree and 5+ years of industry experience
OR Masters in Electrical Engineering, Computer Engineering or related STEM degree and 3+ years of industry experience
OR PhD in Electrical Engineering, Computer Engineering or related STEM degree and 2+ years of industry experience
At least one of the key DFT features such as TAP/JTAG, Scan/ATPG or Array DFT (MBIST/PBIST) (This is a key skill requirement.)
SoC or IP DFT design, integration or verification
EDA tools such as ATPG tools, Siemens Tessent shell, VCS simulation and/or debug tools
Preferred
Silicon enabling debug or test pattern development experience
Design automation skills and proficiency in programming or scripting languages
Structural design flows, including timing, routing, placement or clocking analysis
High volume manufacturing requirements and test flows
3D, media and display graphics pipelines
SoC architecture
Benefits
Competitive pay
Stock bonuses
Health
Retirement
Vacation
Company
Intel Corporation
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside.
10001+ employees
H1B Sponsorship
Intel Corporation has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
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2025 (2793)
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2023 (3576)
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2021 (3359)
2020 (1174)
Funding
Current Stage
Late StageLeadership Team
Brea Watts, MFA
Communications Manager, CEO
Carol Bartz
CEO
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