Headsbase · 3 months ago
Senior Verification Engineer
Headsbase specializes in programmable coherent DSP solutions for cloud and AI infrastructure, empowering the future of AI infrastructure and cloud connectivity. They are looking for a Senior Verification Engineer to drive RTL design verification activities across various design aspects.
Management Consulting
Responsibilities
Plan and perform the verification of digital design blocks according to the design specification and interacting with design engineers
Build verification environments using SystemVerilog and UVM
Identify and write all types of coverage measures for corner-cases
Debug the functionality with design engineers
Perform coverage collection and follow the metrices to close the full functionality
Qualification
Required
6+ years of experience – a must
Performed at least 2 or more full block/system verification cycles
In depth knowledge in VLSI verification flow, languages and concepts
Verification using one of the known methodologies (eRM, UVM, OVM)
Preferred
Experience in data path or data protocols, specifically Ethernet - preferred
Company
Headsbase
At Headsbase, we help organizations strengthen their workforce through modern talent solutions.
Funding
Current Stage
Early StageCompany data provided by crunchbase