BayOne Solutions · 15 hours ago
Formal Design Verification Engineer
Austin, TX
Contract
Onsite
Mid Level
$75/hr - $85/hr
3+ years expBayOne Solutions is a company looking for a Contract - Formal Design Verification Engineer. In this role, you will develop formal constraints and checks for GPU designs, working closely with RTL designers to ensure verification quality and addressing any formal failures.
Information and Communications Technology (ICT)Information ServicesInformation TechnologySaaSSoftware
Hiring Manager
Prince Madaan
Responsibilities
Develop formal verification setup using System Verilog modules and Assertions
Run formal verification checks, analyze the results, and debug any issues
Develop and enhance constraints, checks, and cover points to achieve verification quality
Verify GPU design blocks using formal verification approaches like sequential equivalence checking, property-based feature verification, and datapath verification using C models
Hands-on experience in developing formal-based datapath verification setups using RTL & C Models
Hands-on experience in developing formal property-based feature verification setups
In-depth expertise on proof depth and convergence analysis for formal setups
Root cause formal failures to identify design or test setup issues
Analyze and deploy formal convergence techniques like abstraction, blackboxing, and design reductions
Work closely with cross-functional teams, including design, architecture, and software teams, to ensure that verification efforts are aligned with project goals and requirements
Participate in the development and improvement of verification methodologies, tools, and flows to increase efficiency and effectiveness of verification efforts
Adhere to project execution and planning approaches using Confluence, JIRA, and relevant techniques
Create and maintain documentation for formal verification test plans, convergence reports, complexity analysis reports, and results
Responsible for driving formal verification tasks & reporting to project verification leads as required
Qualification
Required
BSEE, Computer Engineering, or Computer Science bachelor's degree and a minimum of 3+ years of experience
Good understanding of CPU and/or GPU design architecture
Strong experience or exposure to System Verilog (SV) and System Verilog Assertion (SVA) coding skills is required
Experience in developing formal verification setups is a must
Experience working in a Linux environment
Excellent communication skills and be able to work with cross-functional teams to execute the verification plan
Preferred
A Master's or Ph.D. degree is preferred
Experience in developing constrained random testbenches is preferred
Experience with formal verification tools such as VC Formal, Jasper Gold, or Questa Formal
Company
BayOne Solutions
BayOne Solutions provides computer programming services.
501-1000 employees
H1B Sponsorship
BayOne Solutions has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (23)
2024 (25)
2023 (20)
2022 (30)
2021 (20)
2020 (37)
Funding
Current Stage
Late StageLeadership Team
Yogesh Virmani
CEO and Co-founder
Rahul Sharma
President and Co-founder
Recent News
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