ACL Digital ยท 11 hours ago
Mixed-Signal Design Verification Engineer
San Diego, CA
Contract
Onsite
Mid, Senior Level
4+ years expACL Digital is seeking a Design Verification Engineer to work on high-speed PHY and mixed-signal IPs. The role involves building verification environments, performing various levels of verification, and collaborating with multiple teams.
Business IntelligenceCloud ComputingDevOpsHardwareInformation TechnologyInternet of ThingsMobile AppsRetail TechnologySaaSSoftware
Responsibilities
Build verification environments using SystemVerilog / UVM
Perform PHY-level, mixed-signal, low-power, formal, and gate-level verification
Write SVA assertions, functional coverage, and drive coverage closure
Collaborate with digital, analog, SoC, and post-silicon teams
Qualification
Required
Strong experience in SystemVerilog / UVM
Experience with PHY / SerDes or mixed-signal IP verification
Experience in protocols: PCIe, USB, MIPI, DDR, CXL, UFS
Experience with PLL, ADC, DAC, sensors
Experience range: 4 years to 15 years
Company
ACL Digital
ACL Digital is a design-led digital engineering and transformation firm.
1001-5000 employees
H1B Sponsorship
ACL Digital has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (38)
2024 (29)
2023 (26)
2022 (33)
2021 (20)
2020 (19)
Funding
Current Stage
Late StageLeadership Team
Srikanth Raghavan
Associate Vice President
Recent News
2025-11-28
Precedence Research
2025-11-28
Company data provided by crunchbase