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Raytheon · 15 hours ago

Senior CMOS IC CAD Engineer

Goleta, CA

Full-time

Onsite

Mid, Senior Level

$96K/yr - $182K/yr

5+ years exp

Raytheon is a leading company focused on providing innovative solutions for national defense. They are seeking a Senior CMOS IC CAD Engineer to join their Integrated Circuits Design Team, where the candidate will support the design and development of advanced image sensors and CAD tools.

Intellectual PropertyInternetWeb Hosting

No H1B

U.S. Citizen Only

Responsibilities

Install, configure, and support foundry PDKs

Custom edit foundry technology files to define and implement RVS ICDC design methodologies

Support and maintain CAD tools used by IC designers including Virtuoso, DRC/LVS/PEX/PERC verification tools, extractions, and spice simulation tools

Work with CAD tool vendors to identify and resolve bugs, improve tool usability, and evaluate new tools and features

Develop infrastructure to support design work in new process technologies

Act as Linux, Subversion (SVN) version control, and Keysight (Cliosoft) Design Data Management (SOS) administrator

Write scripts using Perl and Cadence SKILL

Qualification

CMOS layoutVLSI designSiemens CalibreSVRF scriptingPerl programmingTcl programmingCadence SKILLUnix experienceSubversion (SVN)Design Data ManagementInterpersonal skillsCollaboration

Required

Typically requires a Bachelor's Degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience with MOSFET device behavior, CMOS layout including front-end devices structures, and VLSI design

Experience writing and debugging SVRF (Standard Verification Rule Format) scripting language to define/modify DRC & DFM rules (including density fill) in Siemens (Mentor Graphics) Calibre tool

Experience in Calibre in order to support, enhance, and debug foundry DRC and Antenna rules

Experience programming in Perl, Tcl (Tool Command Language) and Cadence SKILL, as well as Unix, Subversion (SVN) version control, c-shell programming experience, and SOS administration experience

Preferred

M.S. in Electrical Engineering or Computer Science

Familiarity with ROIC architecture and design concepts

Experience with distributed computing environments

Experience managing vendor support

Experience with Digital Design and Signoff tools, such as Cadence Genus, Innovius, Tempus, Voltus, etc., or Synopsys Design Compiler, IC Compiler, Fusion Compiler, PrimeTime, TestMAX, etc

Experience with simulators like Spectre, Ultrasim, and CustomSim