Western Digital · 15 hours ago
Principal Analog/Mixed-Signal IC Design Engineer
San Jose, CA
Full-time
Onsite
Lead/Staff
8+ years expWestern Digital is a company dedicated to powering global innovation through advanced technology. The Principal Analog/Mixed-Signal IC Design Engineer will be responsible for designing high-performance analog and mixed-signal circuit blocks, involving various aspects of circuit architecture, design, and evaluation.
Big DataComputerHardwareManufacturingSoftware
Responsibilities
Designer will be responsible for the design of high performance analog and mixed-signal circuit blocks
Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation
Job responsibilities require ability to communicate at all levels and with cross functional groups
Qualification
Required
Must have hands-on design and development experience in analog and mixed-signal integrated circuit
Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Amplifiers – operational, instrumentation, wide-bandwidth etc
Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: PMIC – Linear and switched regulators, Low-drop out regulators etc
Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Data converters – ADC, DAC, Flash and SAR type
Must have experience in 40nm and below CMOS technology
Must have a demonstrable track record of successful design releases and mass production
Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.)
Experience with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization
Experience with floor planning, block level routing and top level chip routing
Knowledge of high performance and deep CMOS analog reliability considerations such as EM-IR, SOA and VDR and relevant mitigation techniques
Functional knowledge of logic digital circuits and understanding of basic digital design flow
Experience working with distributed design teams a plus
Must possess strong written and verbal communication skills
BSEE with 10+ years of experience
MSEE with 8+ years of experience
PhD with 4+ years of experience
Benefits
Paid vacation time
Paid sick leave
Medical/dental/vision insurance
Life, accident and disability insurance
Tax-advantaged flexible spending and health savings accounts
Employee assistance program
Other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity
Tuition reimbursement
Transit
The Applause Program
Employee stock purchase plan
The Western Digital Savings 401(k) Plan
Company
Western Digital
Western Digital helps customers capture, preserve, access, and transform an ever-increasing diversity of data.
10001+ employees
H1B Sponsorship
Western Digital has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (234)
2024 (537)
2023 (448)
2022 (580)
2021 (525)
2020 (332)
Funding
Current Stage
Public CompanyTotal Funding
$901.37M2023-10-31Post Ipo Debt· $1.37M
2023-01-31Post Ipo Equity· $900M
2015-09-30Post Ipo Equity
Leadership Team
Sesh Tirumala
SVP, CIO
A
Alvin B. Phillips
Founder
Recent News
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