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Advanced Microdevices Pvt. Ltd. (India) · 14 hours ago

ASIC/RTL Design Engineer

San Jose, CA

Full-time

Onsite

Senior Level

Advanced Micro Devices, Inc is committed to building innovative products that enhance computing experiences across various domains. They are seeking a Senior ASIC/RTL Design Engineer to contribute to the development of large SoCs, focusing on RTL ownership, integration, and timing constraint verification.

BiopharmaBiotechnologyIndustrialManufacturing

No H1B

Responsibilities

Responsible for RTL design and integration

The candidate is expected to contribute to all aspects of SoC design including chip definition, architecture development and modeling, development of micro-architectural specification, conversion of micro-architectural specifications to logic implementation, verification, emulation, debug, synthesis and timing closure

Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff

Lead the effort to maintain RTL quality metrics in complex, hierarchical designs, while automating the process for increased efficiency

Implement the pre-route timing checks and QoR clean up to eliminate timing constraints issues and ensure a quality handoff for STA (static timing analysis) checks

Collaborate with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) work flows

Require a blend of SDC expertise, proficiency in EDA tools, and Tcl based scripting abilities (in both EDA environment and standalone Linux Tcl shell scripts)

Continuously review and identify areas for process improvements and early issue detection during the design phase

Qualification

RTL designSDC expertiseEDA tools proficiencyTCL scriptingSoC design experienceTiming constraints developmentStatic timing analysisAnalytical skillsProblem-solving skillsCommunication skillsCollaboration