Senior ASIC Design Engineer jobs in United States
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Cornelis Networks · 3 months ago

Senior ASIC Design Engineer

Cornelis Networks delivers high-performance scale-out networking solutions for AI and HPC datacenters, and they are seeking a Senior ASIC Design Engineer to contribute to their advanced Ethernet protocol designs. The role involves designing and implementing Ethernet protocols, collaborating with verification engineers, and supporting post-silicon validation to optimize performance and power-aware design strategies.

Artificial Intelligence (AI)Information TechnologySoftware
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H1B Sponsor Likelynote

Responsibilities

Design and implement advanced Ethernet protocols for next-generation Ethernet switch ASICs, focusing on RTL development
Develop microarchitecture specifications for Ethernet protocol blocks
Implement Ethernet protocols such as Priority Flow Control, TCP, UDP, RoCEv2, VLAN, ECMP, DCQCN, ECN, and Security in Transmit and Receive pipelines using Verilog/System Verilog
Collaborate with verification engineers to create block- and system-level test plans to ensure comprehensive design coverage
Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure
Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug and resolve ASIC issues
Contribute to performance optimization and power-aware design strategies for Ethernet subsystems

Qualification

ASIC design experienceEthernet protocols expertiseVerilog/System VerilogDigital design proficiencyScripting languagesSystem-level debugTiming closure familiarityAsynchronous interfacesCommunication skills

Required

B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field
10+ years of industry experience in digital design with proficiency in Verilog and System Verilog
Experience in RTL design for Ethernet protocols relevant to adapters and switches
Familiarity with timing closure and modern physical design methodologies
Proven ability in system-level debug and root cause analysis of technical issues
Strong verbal and written communication skills

Preferred

Deep knowledge of Ethernet architecture and networking protocols (L2/L3/L4 layers)
Prior experience with Ethernet MAC integration and development of L2/L3/L4 protocols for ASICs, including system debug
Expertise in multiple clock domain designs and asynchronous interfaces
10+ years of experience with scripting languages such as TCL, Python, or Perl
Familiarity with EDA tools like Design Compiler, Spyglass, or PrimeTime

Benefits

Medical, dental, and vision coverage
Disability and life insurance
Dependent care flexible spending account
Accidental injury insurance
Pet insurance
Generous paid holidays
401(k) with company match
Open Time Off (OTO) for regular full-time exempt employees
Sick time
Bonding leave
Pregnancy disability leave

Company

Cornelis Networks

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Cornelis Networks develops purpose-built fabrics for scientific, commercial, and government organizations.

H1B Sponsorship

Cornelis Networks has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (6)
2024 (2)
2023 (1)
2022 (2)
2021 (1)

Funding

Current Stage
Growth Stage
Total Funding
$93.3M
Key Investors
IAG Capital PartnersDowning Ventures
2024-03-12Series B· $25M
2023-08-24Series Unknown· $19.3M
2022-11-14Series B· $29M

Leadership Team

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Lisa Spelman
CEO
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Philip Murphy
Co-Founder, President, and Chief Operating Officer
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Recent News

Inside HPC & AI News | High-Performance Computing & Artificial Intelligence
Inside HPC & AI News | High-Performance Computing & Artificial Intelligence
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