Eximietas Design · 14 hours ago
Design Verification Engineer
San Francisco Bay Area
Full-time
Onsite
Senior Level
7+ years expEximietas Design is hiring Silicon Design Verification Engineers with a focus on SystemVerilog/UVM-based verification and protocol-level debug for silicon programs. The role requires hands-on experience in design verification at the IP and subsystem level, along with collaboration with design and silicon teams.
Artificial Intelligence (AI)Cloud ComputingInformation TechnologyMachine Learning
No H1B
Hiring Manager
Mohini Tyagi
Responsibilities
Hands-on design verification at IP and subsystem level
Development of UVM testbenches using SystemVerilog
Writing sequences, scoreboards, assertions, and coverage
Verification and debug of common industry protocols such as PCIe, Ethernet, USB, DDR, I2C, SPI, and UART
Integration and debug of third-party VIPs from Synopsys and Cadence
Gate-level simulation and power-aware verification using X-prop and UPF
Debugging using waveform viewers and logs
Collaboration with design and silicon teams
Support verification sign-off and documentation
Qualification
Required
7+ years of hands-on experience in Silicon / Design Verification
Strong SystemVerilog and UVM coding skills
Experience with protocol verification and debug
Experience at IP or subsystem level
Familiarity with processor-based verification environments
Experience with VCS, Xcelium/Xsim, and waveform debug tools
Knowledge of C–SystemVerilog interaction and basic C test writing
Scripting experience (shell, Makefile, Perl)
Strong debugging and problem-solving skills
Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, or related field
Candidates must have valid U.S. work authorisation that does not require sponsorship now or in the future
Company
Eximietas Design
Eximietas Design is a technology consulting and solutions development firm.
501-1000 employees
Funding
Current Stage
Late StageLeadership Team
Jay Avula
CEO
Company data provided by crunchbase