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Bolt Graphics · 12 hours ago

Senior Verification Engineer

Sunnyvale, CA

Full-time

Hybrid

Senior Level

$130K/yr - $265K/yr

Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient graphics processors. They are seeking a highly skilled Verification Engineer to develop tests and verification procedures for complex silicon IP and oversee junior verification engineers.

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Responsibilities

Work in a System Verilog/UVM environment developing tests, testbenches, UVM components, and regressions/test lists

Develop formal verification procedure for complex silicon IP

Verify FPGA designs, including SOC architectures, design and implement test benches for both unit level and system level environments, and create reusable verification environments that can be used across multiple projects

Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix

Oversee verification contractors and junior verification engineers

Work in a fast-paced startup environment on a variety of products

Work collaboratively and in tandem with system architects, FPGA design engineers, and embedded software engineers across different timezones

Establish and maintain effective working relationships across departments

Qualification

UVMFormal VerificationSystem VerilogXilinx Alveo platformXilinx Versal platformZebu emulationOverseeing junior engineersVerification methodologyPre-Post silicon lifecycleCoverage closure

Required

BS or higher in Computer / Electrical / Software engineering or related field

Experience with UVM

Experience with Formal Verification

Experience verifying System Verilog

Experience with overseeing junior verification engineers

Exposure to all stages of verification requirements collection, creation of verification methodology plans, test plans, testbench implementation, Testcases development, coverage closure, documentation and support

Experience working at a startup and navigating ambiguity

Experience with the Xilinx Alveo platform

Experience with of IEEE 754

Experience with the pre-and-post silicon lifecycle

Experience with the Xilinx Versal platform

Experience with Zebu emulation