NXP Semiconductors · 1 week ago
Senior Design Engineer (SoC RTL)
San Diego (Innovation Dr)
Full-time
Onsite
Senior Level, Lead/Staff
$166K/yr - $228K/yr
8+ years expNXP Semiconductors is a leader in secure connectivity solutions for embedded applications, driving innovation in various markets. The Senior Design Engineer (SoC RTL) will be responsible for building subsystems and SoC RTL integration, collaborating closely with architecture and design teams to ensure high-quality designs for future autonomous vehicles and IoT devices.
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Responsibilities
Building Subsystems and/or SoC RTL integration for Internal or Vendor driven IPs like ARM Cores, DDR, PCIe, Ethernet, DSP/AIML cores, GPU, VPU, MIPI-CSI, USB, Display Controller
Write Micro-Architecture and detailed design specification in close collaboration with architecture, circuit designers, DFT/Physical Design/Verification engineers
Provide high-quality RTL description, including assertions, for the design
Perform all aspects of the SoC design flow from high level design to Synthesis
Perform concept studies and provide direction in terms of performance, gate count and power for various digital designs
The team works on Best in class Leading technologies designing chips for future Autonomous EVs or IoT Devices
Being life-critical application, all engineers are trained on Functional Safety and Design Quality standards to ensure correct by construction architecture and designs
Existing team is a mix of Design Architects, Domain experts and Tools/Flows/Methodology/Process champions - Right set of people who can own full chip from Definition to Production
Team is groomed to demonstrate right set of values like Customer First, Ownership, Collaboration, Speed and Quality
Great opportunities to innovate with supportive and encouraging environment, converting into Patents, Defensive Publications and Trade Secrets with generous rewards
The role also involves contributing to improvements in Tools, Flows and Methodologies across global design community, interacting with global sites
There are opportunities to work in wide range of domains and learning through cross-functional handoffs and interactions
Qualification
Required
MS or PhD in Electrical/Electronic/ Computer Engineering
Requires 8+ years of experience in high performance digital logic designs and SoC Integration using ARM Cores, Bus Protocols and Interconnects
Must have expertise on RTL Sign off checks (LINT, CDC, RDC, LEC, UPF)
Experience with Synopsys VCS or Cadence RTL simulator, Design Complier (DC) or RTL Compiler (RC or Genus), Verdi Debugging tool
Self-motivated with Excellent written and verbal communication skills
Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components
Should be a team player and willing to work with cross functional teams in issues resolution
Experience collaborating with international teams
Experience mentoring junior team members and overseeing their work
Preferred
Clock/Reset/Power Management Architecture would be a plus
Logic Synthesis and Timing Closure, Netlist ECO would be a plus
ISO26262 based functional safety relevant microcontroller architectures is a plus
Benefits
Health
Dental
Vision insurance
401(k)
Paid leave
Company
NXP Semiconductors
NXP Semiconductors produces secure connectivity solutions for embedded applications.
10001+ employees
Funding
Current Stage
Public CompanyTotal Funding
$2.56BKey Investors
European Investment Bank
2025-08-12Post Ipo Debt· $1.5B
2025-01-15Post Ipo Debt· $1.06B
2010-08-06IPO
Leadership Team
Bill Betz
Chief Financial Officer
Andy Micallef
EVP Global Operations
Recent News
Hindu Business Line
2026-01-22
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