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Google · 1 day ago

Senior CPU RTL Design Engineer, Silicon

Mountain View, CA, USA

Full-time

Onsite

Senior Level, Lead/Staff

$156K/yr - $229K/yr

8+ years exp

Google is a leading technology company known for its innovative products and services. The role involves contributing to the design and development of custom silicon solutions, focusing on CPU subsystem design, integration, and validation for mobile devices. The engineer will work on delivering high-performance designs while collaborating with various teams to enhance microarchitecture features.

AppsArtificial Intelligence (AI)Cloud StorageSearch EngineSEO

Growth Opportunities

H1B Sponsor Likely

Responsibilities

Contribute to CPU subsystem design, focusing on SoC integration related activities, functional debug and preparation for post-silicon testing

Participate in post-silicon CPU subsystem design activities for mobile devices (phone-class SoCs), focusing on hardware-software integration and validation of CPU features in real silicon

Contribute to CPU subsystem microarchitecture and RTL design, delivering production-quality designs that meet Power, Performance, and Area (PPA) goals for next-generation processors

Develop expertise in cache subsystems or vector arithmetic dataflow design and debug

Propose and implement performance-enhancing microarchitecture features with efficiency in mind, working closely with architects and performance teams to facilitate decision-making

Qualification

RTL designVerilog/SystemVerilogSilicon validationDigital logic designRISC architectureAMBA CHI protocolHardware debuggingLogic optimizationSoft skills

Required

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience

8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog

Experience with silicon validation and hardware debugging, specifically for phone/mobile-class application processors

Experience with logic optimization techniques and RTL static checks (e.g., CDC, LINT)

Preferred

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture

Excellent background and an understanding of Advanced Reduced Instruction Set Computing (RISC) Machine (ARM) architecture, in particular, around debug features

Excellent background and an understanding of the Advanced Microcontroller Bus Architecture (AMBA) Coherent Hub Interface (CHI) protocol and system-level coherency management

Benefits

Bonus

Equity

Benefits

Company

Google

Glassdoor4.4

Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.

Founded in 1998

Mountain View, California, USA

10001+ employees

https://www.google.com

H1B Sponsorship

Google has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (8763)

2024 (8872)

2023 (9682)

2022 (11626)

2021 (9109)

2020 (9785)

Funding

Current Stage

Public Company

Total Funding

$26.1M

Key Investors

Andy Bechtolsheim

2004-08-19IPO

1999-06-07Series Unknown· $25M

1998-11-01Angel· $1M

Leadership Team

Sundar Pichai

CEO

Thomas Kurian

CEO - Google Cloud

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