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Google · 1 day ago

Package Design Lead Engineer, Google Cloud

Sunnyvale, CA

Full-time

Onsite

Senior Level, Lead/Staff

$183K/yr - $271K/yr

8+ years exp

Google is a leading technology company, and they are seeking a Package Design Lead Engineer to shape the future of AI/ML hardware acceleration. The role involves developing advanced package substrate designs for ML chips and collaborating with various engineering teams to optimize designs for performance and reliability.

AppsArtificial Intelligence (AI)Cloud StorageSearch EngineSEO

Growth Opportunities

H1B Sponsor Likely

Responsibilities

Physical package substrate design of large form-factor package for ML High-Performance Computers (HPCs)

Develop and implement the methodology and Computer Aided Design (CAD) flow for efficient substrate design and enhanced productivity

Manage and drive co-design initiatives across chip, package, and system levels, including securing production sign-off for package designs

Collaborate closely with Signal integrity (SI)/Power Integrity (PI), thermal, and mechanical engineering teams to refine and optimize product package designs, test vehicles, and mock-up designs for product feasibility

Define and document the requirements for the package substrate design and Bill of Materials (BOM)

Qualification

Chip package designCadence APDDesign for ManufacturingDesign automationPhysical verification flowMechanical CAD2.5D/3.5D designScripting skillsLeadership skillsProject managementCross-functional collaboration

Required

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience

8 years of industry experience in chip package design/layout using Cadence APD or Mentor Expedition

Experience in chip package substrate layout, design verification, Design for Manufacturing (DFM) and taping out for production

Experience in design automation and scripting

Preferred

Experience in large-scale 2.5D/3.5D advanced package design

Experience in working with cross-functional teams including chip design, SI/PI, and Printed Circuit Board (PCB) design teams

Experience in physical verification flow (Layout Versus Schematic (LVS), Design Rule Check (DRC), Connectivity)

Experience with CAD for creating simple mechanical drawings, such as package outline drawings (POD)

Excellent leadership and project management skills

Excellent scripting skills to customize elements of the Cadence or Mentor workflow

Benefits

Bonus

Equity

Benefits

Company

Google

Glassdoor4.4

Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.

Founded in 1998

Mountain View, California, USA

10001+ employees

https://www.google.com

H1B Sponsorship

Google has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (8763)

2024 (8872)

2023 (9682)

2022 (11626)

2021 (9109)

2020 (9785)

Funding

Current Stage

Public Company

Total Funding

$26.1M

Key Investors

Andy Bechtolsheim

2004-08-19IPO

1999-06-07Series Unknown· $25M

1998-11-01Angel· $1M

Leadership Team

Sundar Pichai

CEO

Thomas Kurian

CEO - Google Cloud

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