Acceler8 Talent · 3 hours ago
Senior Design Verification Engineer
Acceler8 Talent is seeking an experienced Design Verification Engineer to join a well funded startup whose hardware promises to drastically change the economics of compute for the worlds' largest models. As a Senior Design Verification Engineer, you’ll own verification planning and execution at the full chip and subsystem level, defining test plans, creating testbenches, and owning verification toward various silicon milestones.
Responsibilities
Own verification planning and execution at the full chip and subsystem level
Defining test plans
Creating testbenches
Owning verification toward various silicon milestones
Qualification
Required
Experience driving verification from concept-to-silicon
8+ years working in design verification
Excellent SystemVerilog knowledge
Experience with Python, C/C++, Bluespec or similar scripting and programming languages for verification and silicon modeling
Production experience with advanced verification methodologies (UVM, ABV, formal verification, etc.)
Strong understanding of silicon micro-architecture and design concepts used in high-performance compute, high-speed connectivity, memory management, and related functionalities
Experience verifying data center/networking chips at subsystem or full chip level
Preferred
Familiarity with emulation and prototyping platforms and methodologies
Hands-on experience with participation in silicon debugging and bring-up