Acceler8 Talent · 1 day ago
Emulation Engineer
Mountain View, CA
Full-time
Hybrid
Senior Level
$200K/yr - $300K/yr
5+ years expAcceler8 Talent is seeking an experienced Design Verification / Principal Emulation Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. In this role, you will lead the effort to build comprehensive hardware emulation frameworks and execute emulation test plans, contributing to the verification methodology and execution across various levels of validation.
Staffing & Recruiting
Hiring Manager
Mia Macdonald
Responsibilities
Lead the effort to build comprehensive hardware emulation frameworks and execute emulation test plans
Contribute to the verification methodology and execution across blocks, subsystems, full chip, and system-level validation
Own portions of the verification execution at the subsystem and chip level, creating test benches and executing progress and verification closures toward various silicon milestones
Qualification
Required
Developed, debugged, and deployed emulation-based prototyping platforms
Experience driving verification from concept-to-silicon
Knowledge of LPDDR/HBM
Production experience with advanced verification methodologies (UVM, AVB, formal verification, etc.)
Strong understanding of silicon micro-architecture and design concepts used in high-performance compute, high-speed connectivity, memory management, and related functionalities
5+ years working in design verification roles
Company
Acceler8 Talent
Acceler8 Talent partners with technology companies to propel their funding and business forward.
11-50 employees
Funding
Current Stage
Early StageLeadership Team
Sam McBroom
Director
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