Senior Staff Silicon Validation Engineer jobs in United States
cer-icon
Apply on Employer Site
company-logo

Marvell Technology · 18 hours ago

Senior Staff Silicon Validation Engineer

Marvell Technology is a leading semiconductor solutions company that powers the data infrastructure of the world. The Senior Staff Silicon Validation Engineer will be responsible for PCIe PHY validation in a post-silicon environment, conducting lab-based silicon bring-up, and troubleshooting issues in collaboration with cross-functional teams and customers.

DSPInternet of ThingsManufacturingSemiconductorWireless
check
Growth Opportunities
check
H1B Sponsor Likelynote

Responsibilities

Complete responsibility of PCIe PHY Validation in post-silicon environment. Defining, documenting, executing, and reporting the overall PHY validation/test plan for Marvell storage devices
Lab-based silicon bring-up and unit test execution focused on PCIe Physical and PCS layer hardware and firmware functionality, while also extending to the protocol layer of the PCIe stack
Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER. Analyze and debug issues on Phy protocol of storage interface (SATA, SAS, PCIe, Ethernet)
Troubleshoot failing tests with diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers. Leading collaborative technical discussions to drive resolution on technical issues
Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues related to PCIe PHY. Work closely with customers to address design issue and debug failure cases

Qualification

PCIe PHY ValidationHigh Speed IO testingSERDES characterizationTest equipment knowledgeBoard design knowledgeAnalytical skillsPerlPythonProblem-solving skillsCommunication skills

Required

Strong understanding of high-speed SERDES, equalization technique and PCIe protocols
5-10+ years experience with High Speed IO testing, debugging and validation
Strong lab skills with hands on experience, in system bring up, system testing and debug
In-depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer, etc.)
Strong analytical, problem-solving and communication skills
Complete responsibility of PCIe PHY Validation in post-silicon environment. Defining, documenting, executing, and reporting the overall PHY validation/test plan for Marvell storage devices
Lab-based silicon bring-up and unit test execution focused on PCIe Physical and PCS layer hardware and firmware functionality, while also extending to the protocol layer of the PCIe stack
Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER. Analyze and debug issues on Phy protocol of storage interface (SATA, SAS, PCIe, Ethernet)
Troubleshoot failing tests with diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers. Leading collaborative technical discussions to drive resolution on technical issues
Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues related to PCIe PHY. Work closely with customers to address design issue and debug failure cases

Preferred

Working knowledge of PCIe interface and characterization. Working knowledge and experience on Ethernet and/or SAS/SATA SERDES is a definite plus
Extensive knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset
Working knowledge of board design; able to read board schematics and board layout
Knowledge in SERDES modeling techniques
Working experience with Perl or Python
Bachelor of Science in Electrical Engineering with 8-10 years of relevant work experience, or Master of Science in Electrical Engineering with 6-8 years of relevant work experience - preferred

Benefits

Employee stock purchase plan with a 2-year look back
Family support programs to help balance work and home life
Robust mental health resources to prioritize emotional well-being
Recognition and service awards to celebrate contributions and milestones

Company

Marvell Technology

company-logo
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.

H1B Sponsorship

Marvell Technology has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (242)
2024 (186)
2023 (154)
2022 (210)
2021 (210)
2020 (165)

Funding

Current Stage
Public Company
Total Funding
unknown
2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired

Leadership Team

leader-logo
Matthew Murphy
Chairman and CEO
linkedin
leader-logo
Radha Nagarajan
SVP & CTO, Optical Engineering
linkedin
Company data provided by crunchbase