System-on-Chip Design Engineer jobs in United States
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Harvey Nash · 7 hours ago

System-on-Chip Design Engineer

Harvey Nash is a company seeking a System-on-Chip Design Engineer with extensive experience in IP level verification. The main responsibilities include developing and executing verification test plans for IPs and/or sub-systems, utilizing UVM and System Verilog programming languages.

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H1B Sponsor Likelynote
Hiring Manager
Bhanu Mahankali
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Responsibilities

Develop and execute verification test plans for IPs and/or sub-systems

Qualification

UVMSystem VerilogIP level verificationVerification test plansBA in Engineering

Required

Minimum 10+ overall years of experience is required
Extensive experience of IP level verification using UVM and System Verilog
Develop and execute verification test plans for IPs and/or sub-systems
Advanced knowledge of UVM and System Verilog programming languages
BA in Engineering is required

Company

Harvey Nash

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We’re Harvey Nash, and we build amazing technology and digital teams.

H1B Sponsorship

Harvey Nash has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (62)
2024 (70)
2023 (121)
2022 (67)
2021 (3)
2020 (7)

Funding

Current Stage
Public Company
Total Funding
unknown
1999-02-04IPO

Leadership Team

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Ted Blumenberg
CFO
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Michael Goldberg
Vice President, Strategic Partnerships
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Company data provided by crunchbase