Astera Labs · 1 week ago
Sr. Principal DSP Architect (Optical Transceivers & PAM4)
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
$210K/yr - $260K/yr
12+ years expAstera Labs is a provider of rack-scale AI infrastructure through purpose-built connectivity solutions. The Sr. Principal DSP Architect will lead the definition and development of next-generation Digital Signal Processing architectures, focusing on high-speed PAM4 systems and coherent optical transceivers.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Architectural Leadership: Lead the definition of DSP micro-architecture for high-performance ASICs, focusing on low-power, high-throughput data paths
Algorithm Development: Design, model, and simulate advanced DSP algorithms for:
Adaptive Equalization (FFE, DFE, MLSE)
Forward Error Correction (FEC)
Clock and Data Recovery (CDR)
Chromatic Dispersion (CD) and Polarization Mode Dispersion (PMD) compensation
Modeling & Simulation: Develop bit-accurate and performance-accurate models using Python, MATLAB, or C++ to validate architectural choices against Bit Error Rate (BER) targets
Cross-Functional Collaboration: Work closely with Analog Mixed-Signal (AMS) designers to optimize the ADC/DAC interface and with RTL teams to ensure power-efficient hardware implementation
Performance Trade-offs: Conduct rigorous Power, Performance, and Area (PPA) analysis to balance complex DSP requirements with the thermal and size constraints of optical modules (e.g., QSFP-DD, OSFP)
Standards Contribution: Represent the company in industry standards bodies (IEEE 802.3, OIF) to influence future optical communications protocols
Qualification
Required
Education: PhD or MS in Electrical Engineering, Communication Theory, or a related field
Experience: 12+ years of experience in DSP design, specifically for high-speed SerDes or optical communications
Expertise in PAM4 signaling and the associated challenges (non-linearity, SNR requirements)
Deep understanding of Digital Filter Design (FIR, IIR) and adaptive signal processing
Experience with high-speed ADC/DAC architectures and their impact on DSP performance
Tooling: Proficiency in MATLAB/Simulink, Python (NumPy/SciPy), and SystemC
Silicon Success: A proven track record of taking complex DSP architectures from concept through tape-out to high-volume production
Preferred
Experience with Coherent Optical technologies (QAM, polarization multiplexing)
Knowledge of Machine Learning applications in DSP for non-linearity compensation
Familiarity with hardware description languages (Verilog/SystemVerilog) and the synthesis flow
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
201-500 employees
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
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Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Leadership Team
Jitendra Mohan
CEO
Casey Morrison
Chief Product Officer, Co-Founder
Recent News
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2026-01-07
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