NVIDIA · 2 days ago
Senior ASIC Timing Engineer
Austin, TX
Full-time
Onsite
Senior Level
$136K/yr - $218K/yr
5+ years expNVIDIA is a leader in AI computing and has been transforming computer graphics and accelerated computing for over 25 years. They are seeking a motivated ASIC Timing Engineer to drive timing analysis and closure for their GPUs, CPUs, DPUs, and SoCs while collaborating with cross-functional teams to enhance innovative projects.
AI InfrastructureArtificial Intelligence (AI)Consumer ElectronicsFoundational AIGPUHardwareSoftwareVirtual Reality
Responsibilities
Drive Timing Analysis and Closure: Lead the timing analysis and closure processes for Nvidia’s GPUs, CPUs, DPUs, and SoCs at block level, cluster level, and full chip level
Collaborate with Cross-Functional Teams: Work closely with RTL, DFX, Clocks, and other teams to devise timing closure strategies, create timing constraints, and drive timing and power convergence as well as implement ECOs
Contribute to Cutting-Edge Projects: Play a pivotal role in the success of our innovative projects and advancement of our technology. Leverage your expertise to improve timing convergence flows in collaboration with methodology teams
Qualification
Required
BS (or equivalent experience) in Electrical or Computer Engineering with 5 years experience or MS (or equivalent experience) with 2 years' experience in Timing and STA
Hands-on experience in full-chip/sub-chip Static Timing Analysis (STA) and timing convergence, timing constraints generation and management
Expertise in analysis and fixing of timing paths through ECOs including crosstalk and noise analysis
Expertise in physical design and optimization e.g., placement, routing, logic restructuring, etc. to improve timing and power
Expertise and in-depth knowledge of industry standard STA and timing convergence tools
Knowledge of deep sub-micron process nodes and hands-on experience in modeling and converging timing in these nodes
Preferred
Background in domain specific STA and timing convergence, such as GPUs, CPUs, DPUs/Network processors, or SOCs
Background in logic synthesis and equivalence checking/FV
Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan, BIST, etc
Understanding and timing closure of digital logic/macros in AMS designs/IPs
Experience in methodology and/or flow development as well as automation
Benefits
Equity
Benefits
Company
NVIDIA
NVIDIA is a computing platform company operating at the intersection of graphics, HPC, and AI.
10001+ employees
H1B Sponsorship
NVIDIA has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
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2025 (1877)
2024 (1355)
2023 (976)
2022 (835)
2021 (601)
2020 (529)
Funding
Current Stage
Public CompanyTotal Funding
$4.09BKey Investors
ARPA-EARK Investment ManagementSoftBank Vision Fund
2023-05-09Grant· $5M
2022-08-09Post Ipo Equity· $65M
2021-02-18Post Ipo Equity
Leadership Team
Jensen Huang
Founder and CEO
Michael Kagan
Chief Technology Officer
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