Technical-Link N. America · 5 hours ago
Field-Programmable Gate Arrays Engineer
Sunnyvale, CA
Full-time
Onsite
Senior Level, Lead/Staff
$200K/yr - $260K/yr
10+ years expTechnical-Link N. America is seeking a hands-on FPGA expert with deep experience in AMD Xilinx and Altera platforms. The role involves owning designs end-to-end, from IP integration to timing closure and lab debugging, requiring strong RTL expertise.
ConsultingEmploymentRecruitingStaffing Agency
Hiring Manager
Jeff Anderson
Responsibilities
Own designs end-to-end — from IP integration to timing closure and lab debug
Modify design for FPGA friendly implementation
Achieve timing closure on complex, multi-clock designs
Integrate and debug complex IP (PCIe, Ethernet, DDR/HBM, AXI, SERDES, etc.)
Use ILA, SignalTap, ChipScope to debug real hardware issues
Qualification
Required
10+ years of real-world FPGA design experience
Strong hands-on expertise with Vivado / Quartus
Proven ability to achieve timing closure on complex, multi-clock designs
Experience integrating and debugging complex IP (PCIe, Ethernet, DDR/HBM, AXI, SERDES, etc.)
Comfortable in the lab using ILA, SignalTap, ChipScope to debug real hardware issues
Company
Technical-Link N. America
Technical-Link North America is dedicated to excellence in engineering staffing, connecting top talent with leading companies.
51-200 employees
H1B Sponsorship
Technical-Link N. America has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2024 (1)
Funding
Current Stage
Growth StageCompany data provided by crunchbase