CARIAD, Inc. · 16 hours ago
Principal Engineer, RTL Design
Mountain View, CA
Full-time
Hybrid
Lead/Staff
12+ years expCARIAD is an automotive software development team within the Volkswagen Group, focused on creating a unified software platform for millions of vehicles. The Principal Engineer, RTL Design will lead the design and implementation of complex RTL blocks for neural processing units, providing technical leadership and ensuring high performance and power efficiency in automotive applications.
AutomotiveInformation TechnologySoftware
No H1B
Responsibilities
Lead the design and implementation of complex RTL blocks, modules, and subsystems using Verilog/SystemVerilog for NPU architectures
Collaborate with system and microarchitecture architects to define and refine specifications, translating requirements into robust RTL solutions
Drive architectural and RTL decisions to optimize performance, power efficiency, and area (PPA) for AI workloads
Design and optimize compute engines, data paths, and memory hierarchies for high bandwidth, latency sensitive neural network processing
Own timing analysis and timing closure strategies for complex designs, identifying and resolving critical paths
Apply advanced low power techniques, including clock gating and power aware design methodologies, to meet aggressive power targets
Lead area optimization efforts while preserving functional correctness and performance goals
Ensure testability by guiding and implementing design for test (DFT) strategies to support silicon validation and manufacturing readiness
Provide technical leadership during RTL integration, working closely with verification teams on simulation, emulation, and FPGA prototyping
Partner with software, hardware, and system teams to ensure seamless integration of the NPU into the broader vehicle compute platform
Review designs, mentor engineers, and set best practices for RTL quality, correctness, and maintainability
Author and review technical documentation, including design specifications, architecture reviews, and implementation guidelines
Influence RTL and hardware development methodologies across programs, contributing to consistency and scalability of design practices
Evaluate emerging tools, technologies, and design approaches relevant to AI accelerators and automotive hardware platforms
Communicate complex technical concepts clearly to both technical and nontechnical stakeholders, supporting informed decision making
Qualification
Required
Extensive experience in RTL design using Verilog/SystemVerilog for complex digital systems, preferably NPUs or AI accelerators
Proficiency with EDA tools for synthesis, simulation, and timing analysis (Synopsys, Cadence, Mentor)
Strong understanding of computer architecture, microarchitecture, and hardware/software co‑design
Experience with FPGA prototyping, emulation platforms (e.g., VCS, Palladium), and HW/SW co-verification
Scripting experience (Python, Perl) for automation and productivity
Deep knowledge of low power design and power optimization techniques
Demonstrated track record of delivering complex RTL designs from concept through silicon production
12+ years of experience in RTL design and development for complex digital systems, NPUs, or related advanced computing architectures
Bachelor's degree in Electrical Engineering or Computer Engineering
Preferred
Knowledge of ADAS and automotive hardware requirements
Experience with AI/ML acceleration and neural network processing architectures
Background in high performance and parallel computing design
Familiarity with functional safety concepts (ISO 26262) and safety critical hardware design
Experience with advanced semiconductor process nodes and associated challenges
Exposure to GenAI assisted engineering tools and modern, AI augmented development workflows
Master's degree in Electrical Engineering or Computer Engineering
Company
CARIAD, Inc.
For generations, Volkswagen AG has included a collection of legendary brands.
201-500 employees
Funding
Current Stage
Growth StageLeadership Team
Scott Runner
Chief Executive Officer
Julian Christopher Zeug
Director IT Security, Chief Information Security Officer
Recent News
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