Astera Labs · 7 hours ago
Senior/Staff Physical Design Engineer
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
$135K/yr - $165K/yr
3+ years expAstera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. As a Senior/Staff Physical Design Engineer, you will oversee the planning, coordination, and execution supporting the design of connectivity ASICs for leading cloud service providers and OEMs.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Overseeing the planning, coordination, and execution supporting the design of Astera Labs' portfolio of connectivity ASICs used in the world's leading cloud service providers, server and network OEMs
Working closely with designers, verification engineering, and engineering operations
Qualification
Required
Strong academic and technical background in electrical engineering
A Bachelor's degree in EE / Computer is required, and a Master's degree is preferred
≥3 years' experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications
Professional attitude with the ability to prioritize a dynamic list of multiple tasks, plan and prepare for customer meetings in advance, and work with minimal guidance and supervision
Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!
Hands-on and thorough knowledge of synthesis, place and route, timing, extraction, EM-IR, formal verification (equivalence) and other backend tools and methodologies for technologies 7nm or less
Block level ownership from architecture to GDSII, driving multiple complex designs to production
Experience with Cadence and/or Synopsys physical design tools/flows
Familiarity and working knowledge of System Verilog/Verilog
Proven expertise in developing/maintaining timing constraints, timing signoff methodology, timing closure at the block or full-chip level
Experience with DFT tools and techniques
Experience in working with IP vendors for both RTL and hard-macro blocks
Good scripting skills in tcl, python or Perl
Preferred
Knowledge of design for test (DFT)
Familiarity with ECO methodologies and tools
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
201-500 employees
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Leadership Team
Jitendra Mohan
CEO
Casey Morrison
Chief Product Officer, Co-Founder
Recent News
The Motley Fool
2026-01-07
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