Technical-Link N. America · 8 hours ago
Application Specific Integrated Circuit Design Engineer
San Jose, CA
Full-time
Onsite
Mid, Senior Level
$200K/yr - $300K/yrTechnical-Link N. America is seeking an Application Specific Integrated Circuit Design Engineer. The role involves full-chip and block-level timing closure ownership and requires a good understanding of timing analysis and methodologies.
ConsultingEmploymentRecruitingStaffing Agency
Hiring Manager
Jeff Anderson
Responsibilities
Full-chip and block-level timing closure ownership throughout the entire project cycle
Good understanding of budgeting, hierarchal correlation variations and other non-linearities to model in timing analysis
Develop and maintain methodology and flows related to timing constraints generation, verification, and closure
Should be able to handle STA tools and flows for both block-level and top-level constraint generation and validation
Generate timing ECOs and exposure to Primeclosure or related tool
Work closely with various multi-functional teams on resolving complex timing issues for complex SoCs
Understand and improve existing methodologies and flows
Qualification
Required
Good understanding of timing analysis and exposure to handing complex block and top level SOCs
Experience with high-speed SOC (2GHz+) interface timing closure
Shown experience in handling timing constraints for functional and test modes, block-level and SoC-level static timing analysis
Understanding of various test modes, constraints debugging and timing closure
Well-versed with STA tools in handling constraint generation and validation flows for block-level and SoC-level designs
Good understanding of timing corners and modes, process variations, and signal integrity–related challenges
Timing closure experience with designs having multiple power/voltage domains
Understanding of various chip level interface protocols (SPI, QSPI, I2C, etc), timing requirements and physical guidelines
Good skills in automation (Perl / Tcl / Python)
Solid understanding of constraint analysis and debug using industry-standard tools
Good exposure to power-aware synthesis for block and top-level designs
Familiarity with synthesis, logic equivalence, DFT, CLP, and backend-related methodologies and tools
Self-starter and highly motivated to work with different multi-functional teams
Strong communication and problem-solving skills
Company
Technical-Link N. America
Technical-Link North America is dedicated to excellence in engineering staffing, connecting top talent with leading companies.
Founded in 2000
51-200 employees
H1B Sponsorship
Technical-Link N. America has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
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Trends of Total Sponsorships
2024 (1)
Funding
Current Stage
Growth StageCompany data provided by crunchbase