Cynet Systems · 22 hours ago
RTL Design Engineer - Intermediate
Cynet Systems is a company that specializes in technology solutions, and they are seeking an Intermediate RTL Design Engineer. The role involves participating in all phases of product development, focusing on RTL development, system level integration, and both pre-silicon and post-silicon validation.
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Responsibilities
Participate in technical role in all phases of the product development cycle through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for Ips
RTL Development: Design, verify, and validate high-performance logic using System Verilog/Verilog
Candidates will focus on the data and control path, implementing interfaces for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6
System Level Integration: Utilize the client (Xilinx) Vivado and Vitis ecosystems to integrate custom IP with the Network on Chip (NoC), Memory and other subsystems
Pre-Si Verification: Perform pre-silicon verification and emulation to ensure functional correctness and performance
Post-Si Validation: Perform post-silicon validation, debugging complex interactions between the embedded software, Hard IPs and FPGA hardware fabric
Qualification
Required
Participate in technical role in all phases of the product development cycle through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for Ips
RTL Development: Design, verify, and validate high-performance logic using System Verilog/Verilog
Candidates will focus on the data and control path, implementing interfaces for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6
System Level Integration: Utilize the client (Xilinx) Vivado and Vitis ecosystems to integrate custom IP with the Network on Chip (NoC), Memory and other subsystems
Pre-Si Verification: Perform pre-silicon verification and emulation to ensure functional correctness and performance
Post-Si Validation: Perform post-silicon validation, debugging complex interactions between the embedded software, Hard IPs and FPGA hardware fabric