EdPlus at Arizona State University · 5 days ago
Engineer 3, Integrated Circuit Package Design
Campus: Tempe
Full-time
Onsite
Senior Level
$120K/yr - $120K/yr
5+ years expArizona State University is seeking an Integrated Circuit Package Design Engineer for their Southwest Advanced Prototyping Hub. The role involves developing and designing wafer level packages, collaborating with industry partners, and enhancing engineering solutions for microelectronics innovation.
EducationHigher EducationTraining
No H1B
U.S. Citizen Only
Responsibilities
Package and PCB design work using Cadence Allegro/APD+
Signal Integrity a plus, HFSS a plus
Provide feedback to customers to solve design problems and improvements
Collate and document Advanced packaging tool needs, tool updates, compatibility and flow
Support workshops and training of above within the various programs
Support Circuits and Architecture microelectronics team
EDA tool flow enablement, support the organization on flow changes and new methodologies
Qualification
Required
Bachelor's degree and five (5) years of experience appropriate to the area of assignment/field; OR, Any equivalent combination of experience and/or training from which comparable knowledge, skills and abilities have been achieved
Package and PCB design work using Cadence Allegro/APD+
Signal Integrity a plus, HFSS a plus
Provide feedback to customers to solve design problems and improvements
Collate and document Advanced packaging tool needs, tool updates, compatibility and flow
Support workshops and training of above within the various programs
Support Circuits and Architecture microelectronics team
EDA tool flow enablement, support the organization on flow changes and new methodologies
Preferred
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
Familiarity or similar with Cadence Allegro/APD+ (preferred), Cadence Sigrity, Siemens expedition and ability to learn new tool augmentations
Knowledge of package level Signal integrity/ Power integrity familiarity
Basic Understanding of the Silicon Life Cycle
Basic Familiarity with Circuit/ layout/ DRC/LVS flows
Ability to work across teams
Open to learning new tools, debugging for bring up of tool flows
EDA tool and LINUX/UNIX knowledge and scripting languages
Benefits
Health, dental, and vision insurance plans
Life insurance and disability programs
Sick leave and holidays
ASU/UA/NAU tuition reduction for the employee and qualified family members
State and optional retirement plans
Access to ASU recreation and cultural activities
More
Company
EdPlus at Arizona State University
EdPlus helps undeserved students and communities enhance education through multiple projects, humanitarian projects, and initiatives.
501-1000 employees
Funding
Current Stage
Late StageLeadership Team
Philip Regier
University Dean for Educational Initiatives and CEO of EdPlus at ASU
Nancy Cervasio, MC
Deputy Chief Operating Officer/Student Coaching Services
Company data provided by crunchbase