Google · 9 hours ago
Senior Silicon Package Design Engineer
Mountain View, CA, USA
Full-time
Onsite
Senior Level
$156K/yr - $229K/yr
5+ years expGoogle is a leading technology company that develops custom silicon solutions for its products. The Senior Silicon Package Design Engineer will be responsible for designing and executing physical package substrate designs for mobile SOC packages, collaborating with various engineering teams to optimize product architecture.
AppsArtificial Intelligence (AI)Cloud StorageSearch EngineSEO
Responsibilities
Define, plan and execute end-to-end physical package substrate design of mobile SOC packages as a unique contributor, meeting performance/power/area requirements
Manage and drive co-design initiatives across silicon, package, and system levels, including securing production sign-off for package designs
Participate in the development of new silicon Internet Protocols (IPs) and packaging technology through system requirement analysis, feasibility studies and package test vehicle designs
Collaborate closely with Signal integrity (SI)/Power Integrity (PI), Test, New Product Introduction (NPI) and Mechanical Engineering teams to refine and optimize product package architecture and design. Develop, implement and debug package design methodology and CAD flow
Interface with packaging suppliers, ensuring package design and Bill of Materials (BOM) documentation meets requirements for high volume manufacturing
Qualification
Required
Bachelor's degree in Mechanical, Material, Electrical Engineering, Technology, Science, a related field, or equivalent practical experience
5 years of experience in chip package substrate design using Cadence APD (Allegro Package Designer) or Mentor Expedition with package tape-outs
Experience in chip package substrate layout, design rules/verification, design for manufacturing (DFM) and taping out for production
Experience in mobile SOC package design in the following technologies: FCCSP, Package on Package (PoP), InFO, RDL, IPD, 2.5D/3D, Chiplet
Preferred
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture
Experience in package outline, package routing strategy, bump and ball grid array (BGA) assignment, netlist management
Experience in package design intercept of new packaging technologies and new silicon interfaces/subsystems
Experience in physical verification flow development (e.g., Layout Versus Schematic (LVS), Design Rule Checking (DRC), connectivity)
Experience with CAD for creating simple mechanical drawings, such as Package Outline Drawings (POD)
Benefits
Bonus
Equity
Benefits
Company
Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.
10001+ employees
H1B Sponsorship
Google has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (8763)
2024 (8872)
2023 (9682)
2022 (11626)
2021 (9109)
2020 (9785)
Funding
Current Stage
Public CompanyTotal Funding
$26.1MKey Investors
Andy Bechtolsheim
2004-08-19IPO
1999-06-07Series Unknown· $25M
1998-11-01Angel· $1M
Leadership Team
Sundar Pichai
CEO
Thomas Kurian
CEO - Google Cloud
Recent News
Small Business Trends
2026-01-24
2026-01-24
Search Engine Journal
2026-01-24
Company data provided by crunchbase