FPGA Design/Verification Engineer jobs in United States
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Nesco Resource · 5 days ago

FPGA Design/Verification Engineer

Confidential company is seeking an FPGA Design/Verification Engineer responsible for ASIC and FPGA verification using UVM. The role involves supporting various aspects of ASIC and FPGA development, devising verification plans, and working with a verification team to resolve design bugs.

ConsultingHuman ResourcesStaffing Agency
badNo H1BnoteSecurity Clearance RequirednoteU.S. Citizen Onlynote

Responsibilities

Support other aspects of ASIC and FPGA development such as architecture, design, analysis, and test
Support technical reviews and be able to present to internal and external customers
Devise a unique verification plan for a given design
Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment
Document verification plan and results
Work with an independent verification team to resolve bugs found in the design

Qualification

ASIC/FPGA verificationUVMSystemVerilogLinux-based environment

Required

ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM
3+ years professional experience
Active DoD Secret clearance

Benefits

MEC (Minimum Essential Coverage) plan that encompasses Medical, Vision, Dental, 401K, and EAP (Employee Assistance Program) services.

Company

Nesco Resource

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Nesco Resource s an Staffing and Recruiting firm.

Funding

Current Stage
Late Stage

Leadership Team

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Michael McDonald
Executive Vice President of Finance and Chief Accounting Officer
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