Cadence · 1 day ago
Signal and Power Intgrity Engineer
SAN JOSE
Full-time
Onsite
Entry, Mid Level
$89K/yr - $165K/yr
2+ years expCadence is a company focused on technology innovation and leadership. They are seeking an experienced SIPI Engineer to lead 3D-IC integration projects for complex HPC/AI chips, responsible for developing and implementing advanced packaging SIPI solutions for high-performance AI applications.
AerospaceElectronic Design Automation (EDA)HardwareMobileSemiconductorSoftware
Responsibilities
Develop and implement comprehensive PDN analysis methodologies for complex 3DIC packages, including CPU, GPU, and TPU structures
Perform detailed power noise and signal integrity simulations using tools like Cadence Sigrity PowerSI, Ansys HFSS, or equivalent
Identify and resolve power integrity issues, such as IR drop, ground bounce, and signal noise, to achieve sign-off criteria
Analyze and optimize signal integrity for high-speed interfaces in 3DIC packages, including HBM3, UCIE, and DDR5
Perform advanced SI simulations using industry-standard tools like Cadence Clarity, HyperLynx, Ansys HFSS, or equivalent
Extract parasitic from 3D package layout and integrate them into SI and PI simulations
Develop and implement design rules and guidelines for 3DIC package and silicon SI and PI
Collaborate with design engineers, layout engineers, and thermal engineers to optimize the PDN design and ensure proper heat dissipation
Stay up-to-date on emerging 3DIC technologies and trends and propose innovative solutions to improve power integrity performance
Document analysis results and findings clearly and concisely for internal and external stakeholders
Participate in technical discussions and provide expert guidance on signal/power integrity matters
Qualification
Required
Bachelor's degree in electrical engineering, Computer Engineering, or a related field
2 years of experience in SIPI or related field, In-depth knowledge of PDN design principles, including modeling, simulation, and optimization techniques
Expertise in advanced SI simulation tools like Cadence Sigrity, Clarity, HyperLynx, HFSS, or equivalent
Proven experience in leading and managing complex engineering projects
In-depth knowledge of 3D-IC packaging technologies, including chip stacking, interposers, and through-silicon vias (TSVs)
Proven experience with high-speed interface design and analysis (HBM, DDR, PCIe, etc.)
Strong understanding of thermal, signal integrity, and power integrity concepts
Excellent written and verbal communication skills
Ability to work effectively in a team environment
Benefits
Paid vacation and paid holidays
401(k) plan with employer match
Employee stock purchase plan
A variety of medical, dental and vision plan options
Company
Cadence
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems.
10001+ employees
H1B Sponsorship
Cadence has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (306)
2024 (221)
2023 (282)
2022 (330)
2021 (233)
2020 (209)
Funding
Current Stage
Public CompanyTotal Funding
unknown1998-02-20IPO
Leadership Team
Anirudh Devgan
President and CEO
Paul Cunningham
Senior Vice President and General Manager
Recent News
2026-02-03
2026-01-17
Company data provided by crunchbase