Apple · 1 day ago
PLL Design Engineer
Sunnyvale, CA
Full-time
Onsite
Senior Level
$147K/yr - $272K/yrApple is seeking a highly skilled PLL Design Engineer to join their engineering team, focusing on designing and implementing PLL architectures and circuits. The role involves collaborating with various teams to define requirements, conducting feasibility studies, and designing component blocks for cellular transceivers.
AppsArtificial Intelligence (AI)BroadcastingDigital EntertainmentFoundational AIMedia and EntertainmentMobile DevicesOperating SystemsTVWearables
Responsibilities
As an PLL design engineer, you will be responsible for providing clocking solutions for cellular transceiver chips. Responsibilities include:
Working with platform architects, system, and digital design groups to define the requirements for PLL and its sub-blocks based on the system requirements
Collaborating with the technology team on process selection for the target device
Driving transistor-level feasibility studies of RF/mixed-signal circuit blocks and architectures
Designing various component blocks including PLL, VCO, LO generation, Dividers, Charge Pumps, XTAL, TDCs, DTCs, and other RF/mixed-signal blocks
Conducting transistor-level feasibility studies for new RF circuit architectures and working with platform architects and systems groups to define overall PLL specs
Behavioral modeling of PLL to derive block-level requirements
Floor planning and working with layout designers to implement circuit design with best-practice layout techniques
Defining bench-level test plans and validating, characterizing, and debugging designs through high-volume production
Working closely with the mask design team to implement layout views of designs
Qualification
Required
Strong analytical abilities
Extensive experience in designing and implementing PLL architectures and circuits
Utilize virtuoso knowledge to design PLL Circuits and component blocks including PLL, VCO, LO generation, Dividers, Charge Pumps, XTAL, and other RF/mixed-signal blocks
Conduct transistor-level feasibility studies for new RF circuit architectures
Responsible for simulation and modeling to design and develop analog and mixed signal solutions for next-generation wireless chips
Provide clocking solutions for cellular transceiver chips
Work with platform architects, system, and digital design groups to define the requirements for PLL and its sub-blocks based on the system requirements
Collaborate with the technology team on process selection for the target device
Drive transistor-level feasibility studies of RF/mixed-signal circuit blocks and architectures
Design various component blocks including PLL, VCO, LO generation, Dividers, Charge Pumps, XTAL, TDCs, DTCs, and other RF/mixed-signal blocks
Conduct transistor-level feasibility studies for new RF circuit architectures and work with platform architects and systems groups to define overall PLL specs
Behavioral modeling of PLL to derive block-level requirements
Floor planning and working with layout designers to implement circuit design with best-practice layout techniques
Define bench-level test plans and validate, characterize, and debug designs through high-volume production
Work closely with the mask design team to implement layout views of designs
Preferred
Experience designing fractional-N PLLs, Digital PLLs, sigma-delta PLLs, and VCOs
Strong knowledge of loop design to optimize for phase noise/jitter, lock time, reference spur, area, power, etc
Understanding of device physics and demonstrated ability to apply that to optimize noise, power, area, frequency of PLL blocks
Knowledge of bandgaps, bias, opamps, LDOs, feedback, and compensation techniques
Familiar with Cadence Virtuoso, SpectreRF, and/or C/Matlab/VerilogA modeling
Familiarity with various RF transceiver architectures and their trade-offs is considered a plus
Bring-up and debugging skills, and experience in working with production test engineers to build test plans and design for testability
Ability to stay up to date with industry trends and new technologies to drive continuous improvement
Familiarity with digital design, digital verification, and system-verilog modeling
Familiarity with AI/ML optimization and automation flows
Benefits
Comprehensive medical and dental coverage
Retirement benefits
A range of discounted products and free services
Reimbursement for certain educational expenses — including tuition
Discretionary bonuses or commission payments
Relocation
Company
Apple
Apple is a technology company that designs, manufactures, and markets consumer electronics, personal computers, and software.
Founded in 1976
10001+ employees
H1B Sponsorship
Apple has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (6998)
2024 (3766)
2023 (3939)
2022 (4822)
2021 (4060)
2020 (3656)
Funding
Current Stage
Public CompanyTotal Funding
$5.67BKey Investors
Berkshire HathawayMicrosoftSequoia Capital
2025-05-05Post Ipo Debt· $4.5B
2025-01-16Post Ipo Debt· $0.31M
2021-04-30Post Ipo Equity
Leadership Team
Tim Cook
CEO
Craig Federighi
SVP, Software Engineering
Recent News
Venrock
2025-12-01
2025-09-25
Mac Daily News
2025-09-25
Company data provided by crunchbase