Eliyan Corporation · 10 hours ago
PD - Principal, Physical Design
Bay Area
Full-time
Onsite
Lead/Staff
8+ years expEliyan is a leading chiplet startup focused on creating technologies for tomorrow’s chiplet-based systems. The Principal Physical Design Engineer will oversee the development of cutting-edge ASICs and optimize the entire design flow, ensuring high-quality and timely delivery of manufacturable products.
ElectronicsManufacturingSemiconductor
Responsibilities
Architecture and packaging driven floorplanning and integration so physical partitions match system and package constraints
Well defined boundaries with lego style pin alignment and consistent interface placement across chip and blocks
Feedthrough, repeater and bus planning with early reservation of routing corridors, layers, and resources for cross block connectivity
Define clocking architecture methodology selecting spine and rib, H tree, or mesh to optimize power, skew, latency, and robustness
Establish CTS methodology including skew and latency targets, buffer and ICG strategy, NDR and shielding rules for critical clock routes
Define skew groups and balancing strategy across library corners, ensuring consistent behavior under MMMC variations and derates
Drive clock constraint quality across hierarchy with clean chip to block and block to chip handoff for signoff readiness
Define DRC aware power grid architecture including rings, straps, and mesh, matching metal resistivity assumptions to IR drop targets and EM limits
Ensure careful planning around analog routing with keepouts, shielding, spacing, and grid topology choices that preserve sensitive nets and meet DRC
Drive lego aligned power mesh alignment across top level, subsystem, and block level with consistent strap pitch, via patterns, and clean connectivity
Lead early and signoff EM and IR analysis, identify hotspots, and implement grid reinforcement and via optimization without routing or congestion penalties
Align power planning with floorplan and package constraints including bump map, current demand, and entry points to minimize noise and IR drop
Qualification
Required
8 to 12 years ASIC physical design experience owning floorplanning integration clocking and power planning from early feasibility through signoff and tapeout on complex SoCs
Expert in architecture and package driven hierarchy planning with lego aligned boundaries pin strategy feedthrough repeater bus planning plus CTS methodologies including spine rib H tree or mesh
Strong EM IR PV and STA awareness with MMMC and library corner skew group balancing advanced node exposure TSMC 3nm 2nm or Samsung 2nm and functional ECO execution experience
Benefits
Excellent benefits
Company
Eliyan Corporation
Eliyan's mission is to revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.
11-50 employees
H1B Sponsorship
Eliyan Corporation has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (7)
2024 (3)
2023 (3)
2022 (1)
Funding
Current Stage
Growth StageTotal Funding
$150MKey Investors
VentureTech AllianceSamsung Catalyst Fund,Tiger Global ManagementTracker Capital Management
2026-01-28Series Unknown· $50M
2024-08-13Series Unknown
2024-03-25Series B· $60M
Leadership Team
Syrus Ziai
Founder and VP Engineering
Recent News
2025-10-14
2025-10-14
Company data provided by crunchbase