Normal Computing · 15 hours ago
Hardware Engineer, Logical Design
Buffalo-Niagara Area
Full-time
Onsite
Mid Level
3+ years expNormal Computing is a company focused on building foundational software and hardware to support the semiconductor industry and AI infrastructure. The role involves defining and implementing architecture and microarchitecture for novel compute blocks, collaborating with various teams, and ensuring efficient hardware designs through verification and physical implementation.
AI InfrastructureArtificial Intelligence (AI)Generative AISemiconductor
Responsibilities
Define architecture and microarchitecture for novel compute blocks, collaborating closely with architecture and research teams
Write high-quality RTL in SystemVerilog for core logic, datapaths, and control structures
Work with DV team on digital verification for assigned designs, including testbench development, debugging, coverage, and signoff
Work closely with physical design engineers to ensure RTL is implementable, performant, and aligned with layout constraints
Contribute to functional or performance models to support early exploration, validation, and design tradeoff analysis
Participate in design reviews, verification reviews, and cross-functional debug from concept through silicon
Help shape internal RTL and verification methodologies in a fast-moving startup environment
Qualification
Required
BS, MS, or PhD in Electrical / Electronic Engineering, Computer Engineering, Computer Science, or a related field
3+ years of experience in digital logic design, with meaningful ownership of blocks or subsystems
Strong proficiency in SystemVerilog for RTL design and verification
Experience designing compute cores, accelerators, or similarly complex logic
Hands-on experience with digital verification, including testbench development, debugging, and coverage-driven validation
Ability to work closely with physical design and verification teams to ensure correct, implementable designs
Comfort operating in an R&D-focused, ambiguous environment where architecture, RTL, and verification evolve together
Preferred
Experience with CDC/RDC analysis and mitigation in complex clocking or asynchronous designs
Familiarity with modern verification methodologies and open source verification tools (UVM, Cocotb etc.)
Experience with formal or semi-formal verification techniques (FPV, assertions, property checking)
Prior work integrating third-party or internal IP into larger compute systems
Experience building or improving verification flows, infrastructure, or automation
Background in functional or performance modelling to support architecture exploration or validation
Company
Normal Computing
AI for our most pressing crises in silicon.
11-50 employees
H1B Sponsorship
Normal Computing has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (3)
Funding
Current Stage
Early StageTotal Funding
$34.02MKey Investors
ARIACelesta Capital,First Spark VenturesIntel Ignite
2024-10-31Grant
2024-10-01Series Unknown· $25.5M
2023-01-09Seed· $8.52M
Leadership Team
Faris Sbahi
Co-Founder, CEO
Matthias Tan
Co-Founder, COO
Recent News
Company data provided by crunchbase