Microchip · 21 hours ago
Technical Staff Engineer - Architecture (SOC)
3850 N First St, San Jose, CA 95134, USA
Full-time
Onsite
Senior Level, Lead/Staff
$88K/yr - $232K/yr
10+ years expMicrochip is a global organization that designs technology powering the world. They are seeking a Technical Staff SOC Architecture Engineer to lead the development of SOC FPGA compute platforms for various low-power applications, collaborating with architects and senior designers to deliver next-generation FPGA solutions.
ElectronicsManufacturingSemiconductor
Responsibilities
Lead technical diligence and perform trade-off analysis of product requirements during the Product Concept Phase, translating them into actionable Design Requirements for the Product Definition Phase
Collaborate with Embedded Software teams to define optimal Hardware Abstraction Layer (HAL) and driver interfaces, ensuring seamless integration and performance
Develop detailed microarchitectural specifications, ensuring accurate capture of design intent, identifying technical gaps, and proposing effective remedies
Drive RTL implementation and partner with Logic Verification and ASIC Implementation teams through synthesis and DFT insertion
Lead discussions with CPU and IP vendors to shape future features and requirements
Develop and utilize techniques and tools for SOC benchmarking and bandwidth analysis, delivering optimized system solutions
Work cross-functionally with Functional Verification, ASIC Implementation, and Embedded Software teams across multiple geographical locations
Oversee all facets of interconnect to FPGA fabric, associated peripherals, and IO resources, extending beyond the SOC boundary
Qualification
Required
Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience
10–15 years of industry experience in SOC architecture and design
Proven experience developing ARM M-Class or RISC-V Embedded SOC architectures
Expertise in SOC advanced interconnect, AMBA, SOC peripherals, and DDR memory
Proficiency in developing microarchitecture specifications, RTL design, and logic simulations
Hands-on experience with Verilog, Cadence/Synopsys/Siemens simulation environments, synthesis, and DFT insertion EDA tools
Strong scripting skills in CSH/BASH, PERL, or Python
Demonstrated adaptability and flexibility in a fast-paced, evolving environment
Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams
Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges
Preferred
Experience in SOC architecture performance analysis, tools, and simulators at various abstraction levels (Cycle Accurate, TLM, and/or Functional)
Familiarity with UVM and functional coverage methodology
Experience with vector processing micro-architectures is a major plus
Benefits
Health benefits that begin day one
Retirement savings plans
Industry leading ESPP program with a 2 year look back feature
Company
Microchip
10001+ employees
H1B Sponsorship
Microchip has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (170)
2024 (113)
2023 (116)
2022 (119)
2021 (94)
2020 (100)
Funding
Current Stage
Late StageTotal Funding
unknown2014-02-10Acquired
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