Astera Labs · 10 hours ago
Principal Digital Design Engineer
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
5+ years expAstera Labs is a company providing rack-scale AI infrastructure through innovative connectivity solutions. They are seeking a Principal Digital Design Engineer to develop advanced high-speed SerDes wireline and optical transceivers for AI systems.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Serve as the responsible engineer for at least one critical design block, including architecture definition, design specifications, and RTL delivery
Code and deliver high-quality RTL to the PD and DV teams
Collaborate with the DSP Architecture team to define new features and suggest optimizations for power, latency, and performance
Work with the PD team to resolve timing violations, Spyglass warnings/errors, and CDC violations
Partner with the DV team to root-cause and fix design bugs
Qualification
Required
Hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
5-10 years of experience in digital design for high-speed DSP data path
Be proficient in coding System Verilog for complex design blocks
Have experience with EDA tools for Synthesis, Lint, CDC, and Prime Time
Have experience taking design blocks through the full design cycle, from micro-architecture to tapeout
Have experience with timing fixes, area and power optimizations, and resolving silicon issues
Serve as the responsible engineer for at least one critical design block, including architecture definition, design specifications, and RTL delivery
Code and deliver high-quality RTL to the PD and DV teams
Collaborate with the DSP Architecture team to define new features and suggest optimizations for power, latency, and performance
Work with the PD team to resolve timing violations, Spyglass warnings/errors, and CDC violations
Partner with the DV team to root-cause and fix design bugs
Preferred
Experience in digital design for high speed data path in 100G+ PAM4 DSP SerDes
Experience in designing PAM4 DSP blocks for FFE, DFE, MLSD, and digital timing recovery
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
201-500 employees
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Leadership Team
Jitendra Mohan
CEO
Casey Morrison
Chief Product Officer, Co-Founder
Recent News
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