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Senior Specialist, Field-Programmable Gate Array Design Engineer jobs in United States
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L3Harris Technologies · 12 hours ago

Senior Specialist, Field-Programmable Gate Array Design Engineer

L3Harris Technologies is dedicated to recruiting and developing high-performing talent who are passionate about what they do. They are looking for a talented FPGA design engineer with industry experience in wireless digital communications and digital signal processing. The role involves the whole lifecycle of designs from proposals to verification testing and system support.
CommercialInformation TechnologyNational Security
badNo H1BnoteSecurity Clearance RequirednoteU.S. Citizen Onlynote

Responsibilities

Modulation
Demodulation
Digital filters
Forward Error Correction (FEC)
Electronic Warfare
Networking
Industry standard interfaces (e.g. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet)
FPGA verification through simulation and unit testing
Must be able to obtain a US security clearance

Qualification

FPGA designVHDLDigital Signal ProcessingModulationDemodulationNetworkingElectronic WarfareFPGA verificationSimulation toolsC/C++/C#Matlab/SimulinkCode revision managementLaboratory debug techniquesTiming closureHigh-speed serial interfaces

Required

Bachelor's Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience
Ability to obtain Secret security clearance
Must be able to obtain a US security clearance

Preferred

6+ years FPGA design experience
Experience in either VHDL (preferred) or Verilog development languages
Experience implementing complex modem and/or DSP circuits in programmable logic using FPGA devices. Equivalent experience in ASIC design is also applicable
Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets
Experience with HLS (High-Level Synthesis)
Experience with timing closure in large FPGAs
Experience in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices
FPGA Design using High-speed serial interfaces (3+ Gbps)
Familiarity with code revision management tools such as Git/Clearcase
Familiarity with C/C++/C# and Matlab/Simulink
Active Secret Clearance

Company

L3Harris Technologies

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L3Harris Technologies provides platform management system solutions for armed forces.

Funding

Current Stage
Public Company
Total Funding
$2.25B
2024-03-27Post Ipo Debt· $2.25B
1978-01-13IPO

Leadership Team

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Tania Hanna
Vice President Government & Customer Relations
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Chip Teets
Senior Director, International Programs, Products & Technology
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Company data provided by crunchbase