YO HR Consultancy · 13 hours ago
Sr Layout Designer - Analog/Mixed Signal
YO HR Consultancy is seeking a Senior Layout Designer specializing in Analog/Mixed Signal design. The role involves owning the physical layout design of high-performance circuits while collaborating closely with circuit designers to achieve performance targets and implementing best practices in design-for-manufacturability.
Management Consulting
Responsibilities
Own the physical layout design of high-performance ADC/DAC, SerDes, and analog/mixed-signal circuits across advanced nodes (2nm–16nm)
Plan, and implement layout design for high-speed, low-noise analog blocks, ensuring signal integrity, matching, symmetry, and optimal parasitics
Closely Collaborate with circuit designers to achieve aggressive power, performance, and area (PPA) targets, while maintaining design-for-manufacturability (DFM) best practices
Work with Cadence Virtuoso and Synopsys Verification tools [to perform layout design, verification, and integration
Drive floorplanning and analog block partitioning, ensuring effective power grid design, guard ring placement, and substrate isolation techniques
Partner with foundry and CAD teams to optimize design flows for TSMC FinFET and Gate-All-Around (GAA) process nodes
Conduct LVS, DRC, ERC, and parasitic extraction (PEX) reviews and close layout verification loops
Participate in top-level integration and tape-out, ensuring all layout data and GDS handoffs meet signoff requirements
Provide technical mentorship to fellow engineers and help define layout design methodologies and automation improvements
Qualification
Required
10+ years of industry experience in analog/mixed-signal layout design in advanced process nodes (2nm–16nm, preferably TSMC)
Proven track record designing layouts for high-speed ADC/DAC and SerDes circuits, with deep understanding of timing, matching, shielding, and electromigration considerations
Hands-on experience with Cadence Virtuoso tools (Layout, XL, PVS, Quantus) and solid understanding of schematic-to-layout (S2L) flow
Experience with FinFET and/or Gate-All-Around (GAA) process technologies
Strong understanding of analog layout techniques: current mirrors, differential pairs, resistors, capacitors, biasing, shielding, guard rings, and ESD structures
Experience leading tape-outs, including design documentation, sign-off checks, and cross-team coordination
Good communication skills, both written and oral. The ability to articulate their thought process, and lead junior members is important
Masters in Electrical Engineering, Computer Engineering, or related field
Strong analytical, problem-solving, and communication skills
Self-motivated engineer eager to work in a fast-paced start-up environment, adaptable to evolving project demands
Preferred
Familiarity with Mentor/Siemens Calibre verification tools and scripting (Skill, Python, or Tcl) for layout automation
Exposure to floorplanning and top-level chip integration for complex mixed-signal SoCs
Experience optimizing for signal integrity, IR drop, and thermal effects in high-speed designs
Company
YO HR Consultancy
YO HR (Your Own) human resources established with an ambition to providing Placement to potential Job seekers; headquartered at Indore.
Funding
Current Stage
Growth StageCompany data provided by crunchbase