Teradyne · 19 hours ago
Design and Verification Engineering Intern, Summer 2026 (Teradyne, N Reading, MA)
Teradyne is a global leader in test and automation solutions, ensuring the reliability of electronic devices. They are seeking a Design and Verification Engineering Intern to work on FPGA/ASIC design and verification, participating in design reviews and project goals during the summer.
IndustrialConsumer GoodsConsumer ElectronicsIndustrial Automation
Responsibilities
Work as part of a team on FPGA/ASIC design implementation, specification analysis, and design verification
Participate in design reviews, failure analysis, and achieving project goals
Qualification
Required
Qualified applicants must be currently enrolled in a BS or MS degree program
Qualified majors are EE or CE
Must be currently enrolled in JR or SR level in BS degree program with 3.2 GPA or greater - OR
Currently enrolled MS level students with minimum GPA of 3.2 or greater
Qualified applicants will have course work focused on FPGA/ASIC Design with verilog or other HDL, or course work focused on FPGA/ASIC Verification with verilog or other HDL
Must be available to work on site at the North Reading, Massachusetts office as needed
Must be available during the summer break (May - September) based on school schedule
Excellent written and verbal communication skills
Ability to work in a fast paced and challenging environment
Self-starter. Ability to recognize gaps in his or her own knowledge and seek out answers
Company
Teradyne
Teradyne is a supplier of automatic test equipment used to test complex electronics used in consumer electronics.
Funding
Current Stage
Public CompanyTotal Funding
unknown1978-01-13IPO
Recent News
2026-02-05
2026-02-05
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