Altera · 14 hours ago
Full Chip Power Integrity Engineer
San Jose, California, United States
Full-time
Onsite
Senior Level, Lead/Staff
$143K/yr - $206K/yr
8+ years expAltera is a leading supplier of programmable logic solutions that enable customers to innovate faster across various applications. The Senior Full Chip Power Integrity Engineer will be responsible for ensuring FPGA power intent and reliability, conducting power simulations, and collaborating with cross-functional teams to verify system-level reliability requirements.
SemiconductorEnterprise SoftwareSoftwareManufacturing
Responsibilities
Define, implement, and verify FPGA power intent using UPF across full-chip and subsystem designs
Perform power-aware verification and power electrical rule checking to ensure architectural correctness
Conduct power-up and power-down SPICE simulations at block and system levels
Lead full-chip and system-level power delivery network (PDN) analysis and validation
Analyze IR drop, EM, voltage droop, and dynamic power integrity scenarios
Collaborate with RTL, DV, physical design, package, and reliability teams to debug and resolve power integrity issues
Develop methodologies and flows to improve power reliability signoff
Drive system-level reliability closure across PVT conditions
Support silicon bring-up and post-silicon power integrity validation as needed
Qualification
Required
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
8+ years of experience in power integrity, power intent, or reliability engineering for advanced ASIC/SoC/FPGA designs
Proven experience as part of a Full Chip Integration or Reliability team responsible for FPGA power intent and reliability
Strong hands-on experience with UPF-based power intent definition and verification
Experience performing power electrical rule checking and debugging power intent violations
Experience conducting power-up and power-down SPICE simulations at block and system levels
Experience with system-level power delivery network (PDN) analysis and reliability signoff
Strong understanding of EM/IR, voltage droop, and power integrity fundamentals
Demonstrated ability to work cross-functionally to verify, debug, and sign off system-level reliability items
Preferred
Master's degree or PhD in Electrical Engineering or related discipline
Familiarity with FPGA architectures and programmable logic design
Experience with industry-standard EDA tools for power analysis and reliability signoff
Knowledge of package and board-level power delivery interactions
Experience supporting silicon bring-up and failure analysis
Company
Altera
Altera provides programmable logic devices and design software for various applications. It is a sub-organization of Intel.
1001-5000 employees
H1B Sponsorship
Altera has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (67)
Funding
Current Stage
Public CompanyTotal Funding
unknown2025-04-14Acquired
1988-03-31IPO
Leadership Team
Raghib Hussain
Chief Executive Officer
Recent News
Business Wire
2025-11-25
2025-11-19
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