Array Labs · 4 hours ago
Lead High-Speed PCB Layout Engineer
Palo Alto, California
Full-time
Onsite
Lead/Staff
$160K/yr - $200K/yr
8+ years expArray Labs builds advanced radar systems to help humanity understand and respond to changes across the physical world. As a Lead High-Speed PCB Layout Engineer, you will own the physical implementation of high-speed digital and mixed-signal electronics in Altium, collaborating closely with various engineering teams to ensure design integrity and reliability.
AerospaceManufacturingGeospatial
No H1B
U.S. Citizen Only
Responsibilities
Own high-speed PCB layout from initial placement through manufacturing release in Altium
Define and implement stack-ups, impedance targets, length-matching constraints, and reference plane/return-path strategies for high-speed interfaces
Translate schematic intent into layouts that meet signal integrity and power integrity requirements across mixed-signal and digital domains
Partner with electrical design, firmware, mechanical, and test engineers to develop layout constraints, run reviews, and de-risk first-pass success
Drive DFM/DFT considerations with fabrication and assembly partners, including documentation and release artifacts
Qualification
Required
B.S. in Electrical Engineering, or a related field with 8+ years of relevant experience
Experience in PCB layout, fabrication, and release of high-speed digital and mixed-signal electronics
Excellent teamwork and communication skills
Learns new concepts rapidly, completely, and in a self-directed manner
High levels of self-motivation and personal accountability
Ability to work in a fast-paced environment under significant time constraints
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State
Preferred
Experience designing high-speed digital and mixed-signal PCB layouts including constraint-driven routing, impedance control, and length matching
Comfort with Altium Designer for complex layout and clean manufacturing outputs; familiarity with Allegro and/or OrCAD
Experience developing PCB stack-ups and layout constraints for high-speed interfaces and dense, high-performance boards
A strong intuition for layout-driven SI/PI behavior, including return paths, reference plane strategy, via transitions, and noise coupling between domains
Experience working closely with electrical design engineers to translate schematic intent into layouts that work on the first spin
Experience with manufacturing release, DFM/DFT considerations, and collaborating with fabrication and assembly partners
Experience supporting lab bring-up and debug alongside design and test engineers, including investigating SI/PI issues observed on hardware
Familiarity with SI/PI analysis workflows and tools such as Ansys SIwave, Keysight Power Analyzer, HyperLynx, or Sigrity
Experience taking high-performance hardware from prototype through qualification and environmental testing
Benefits
Competitive pay
Generous equity
High flexibility between salary and equity-based compensation
Company
Array Labs
Array Labs designs and operates space-based radar systems and delivers 3D Earth imagery and geospatial data services.
11-50 employees
Funding
Current Stage
Early StageTotal Funding
$35.6MKey Investors
CatapultGreat Wave Ventures,Seraphim Space
2026-01-05Series A· $20M
2025-07-16Seed
2024-01-01Seed· $10M
Leadership Team
Andrew Peterson
Co-Founder and CEO
Isaac Robledo
Co-Founder/COO
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