Array Labs · 12 hours ago
Senior RF PCB Layout Engineer
Palo Alto, California
Full-time
Onsite
Mid, Senior Level
$125K/yr - $160K/yr
4+ years expArray Labs builds advanced radar systems to help humanity understand and respond to changes across the physical world. As a Senior RF PCB Layout Engineer, you will own the physical implementation of RF and microwave electronics in Altium, ensuring designs meet performance requirements and collaborating with various engineering teams to drive successful manufacturing releases.
AerospaceManufacturingGeospatial
No H1B
U.S. Citizen Only
Responsibilities
Own RF PCB layout from initial placement through manufacturing release in Altium Designer
Define and implement stack-ups, controlled-impedance routing, and RF grounding, shielding, and isolation strategies
Translate schematic intent into layouts that meet RF performance requirements, including connector launches, transitions, filtering, and protection circuitry placement
Partner with RF design, electrical, antenna, mixed-signal, mechanical, and test engineers to develop layout constraints, run reviews, and de-risk first-pass success
Drive DFM/DFT considerations with fabrication and assembly partners, including documentation and release artifacts
Qualification
Required
B.S. in Electrical Engineering, or a related field with 4+ years of relevant experience
Experience in PCB layout, fabrication, and release of RF and/or high-performance electronics
Excellent teamwork and communication skills
Learns new concepts rapidly, completely, and in a self-directed manner
High levels of self-motivation and personal accountability
Ability to work in a fast-paced environment under significant time constraints
Preferred
Experience designing RF and microwave PCB layouts including controlled-impedance routing, launches and transitions, grounding, shielding, and isolation
Comfort with Altium Designer for constraint-driven layout and clean manufacturing outputs; experience with Allegro and/or OrCAD is a plus
Experience developing PCB stack-ups and layout constraints for high-frequency, high-performance electronics
A strong intuition for layout-driven RF behavior, including coupling, return paths, leakage, spurious paths, and stability risks
Experience working closely with RF design engineers to translate schematic intent into layouts that work on the first spin
Experience with manufacturing release, DFM/DFT considerations, and collaborating with fabrication and assembly partners
Experience supporting lab bring-up and RF characterization alongside design and test engineers (e.g., helping troubleshoot issues seen on VNAs, spectrum analyzers, and in system testing)
Experience with EM and RF analysis workflows for layout validation (e.g., HFSS, CST, ADS Momentum) is a plus
Experience taking RF hardware from prototype through qualification and environmental testing
Benefits
Competitive pay
Generous equity
High flexibility between salary and equity-based compensation
Company
Array Labs
Array Labs designs and operates space-based radar systems and delivers 3D Earth imagery and geospatial data services.
11-50 employees
Funding
Current Stage
Early StageTotal Funding
$35.6MKey Investors
CatapultGreat Wave Ventures,Seraphim Space
2026-01-05Series A· $20M
2025-07-16Seed
2024-01-01Seed· $10M
Leadership Team
Andrew Peterson
Co-Founder and CEO
Isaac Robledo
Co-Founder/COO
Recent News
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